Commit 5efe5dec by Richard Sandiford Committed by Richard Sandiford

recog.h (alternative_class): New function.

gcc/
	* recog.h (alternative_class): New function.
	(which_op_alt): Return a const recog_op_alt.
	* reg-stack.c (check_asm_stack_operands): Update type accordingly.
	(subst_asm_stack_regs): Likewise.
	* config/arm/arm.c (note_invalid_constants): Likewise.
	* regcprop.c (copyprop_hardreg_forward_1): Likewise.  Don't modify
	the operand_alternative; use alternative class instead.
	* sel-sched.c (get_reg_class): Likewise.
	* regrename.c (build_def_use): Likewise.
	(hide_operands, restore_operands, record_out_operands): Update type
	accordingly.

From-SVN: r211238
parent 29d70a0f
2014-06-04 Richard Sandiford <rdsandiford@googlemail.com> 2014-06-04 Richard Sandiford <rdsandiford@googlemail.com>
* recog.h (alternative_class): New function.
(which_op_alt): Return a const recog_op_alt.
* reg-stack.c (check_asm_stack_operands): Update type accordingly.
(subst_asm_stack_regs): Likewise.
* config/arm/arm.c (note_invalid_constants): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise. Don't modify
the operand_alternative; use alternative class instead.
* sel-sched.c (get_reg_class): Likewise.
* regrename.c (build_def_use): Likewise.
(hide_operands, restore_operands, record_out_operands): Update type
accordingly.
2014-06-04 Richard Sandiford <rdsandiford@googlemail.com>
* recog.h (recog_op_alt): Convert to a flat array. * recog.h (recog_op_alt): Convert to a flat array.
(which_op_alt): New function. (which_op_alt): New function.
* recog.c (recog_op_alt): Convert to a flat array. * recog.c (recog_op_alt): Convert to a flat array.
......
...@@ -16878,7 +16878,7 @@ note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes) ...@@ -16878,7 +16878,7 @@ note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
this insn. */ this insn. */
preprocess_constraints (); preprocess_constraints ();
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
for (opno = 0; opno < recog_data.n_operands; opno++) for (opno = 0; opno < recog_data.n_operands; opno++)
{ {
/* Things we need to fix can only occur in inputs. */ /* Things we need to fix can only occur in inputs. */
......
...@@ -79,6 +79,14 @@ struct operand_alternative ...@@ -79,6 +79,14 @@ struct operand_alternative
unsigned int anything_ok:1; unsigned int anything_ok:1;
}; };
/* Return the class for operand I of alternative ALT, taking matching
constraints into account. */
static inline enum reg_class
alternative_class (const operand_alternative *alt, int i)
{
return alt[i].matches >= 0 ? alt[alt[i].matches].cl : alt[i].cl;
}
extern void init_recog (void); extern void init_recog (void);
extern void init_recog_no_volatile (void); extern void init_recog_no_volatile (void);
...@@ -263,7 +271,7 @@ extern struct operand_alternative recog_op_alt[MAX_RECOG_OPERANDS ...@@ -263,7 +271,7 @@ extern struct operand_alternative recog_op_alt[MAX_RECOG_OPERANDS
on operand OP of the current instruction alternative (which_alternative). on operand OP of the current instruction alternative (which_alternative).
Only valid after calling preprocess_constraints and constrain_operands. */ Only valid after calling preprocess_constraints and constrain_operands. */
inline static operand_alternative * inline static const operand_alternative *
which_op_alt () which_op_alt ()
{ {
gcc_checking_assert (IN_RANGE (which_alternative, 0, gcc_checking_assert (IN_RANGE (which_alternative, 0,
......
...@@ -482,7 +482,7 @@ check_asm_stack_operands (rtx insn) ...@@ -482,7 +482,7 @@ check_asm_stack_operands (rtx insn)
PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
return 0; return 0;
} }
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
/* Strip SUBREGs here to make the following code simpler. */ /* Strip SUBREGs here to make the following code simpler. */
for (i = 0; i < recog_data.n_operands; i++) for (i = 0; i < recog_data.n_operands; i++)
...@@ -2030,7 +2030,7 @@ subst_asm_stack_regs (rtx insn, stack_ptr regstack) ...@@ -2030,7 +2030,7 @@ subst_asm_stack_regs (rtx insn, stack_ptr regstack)
constrain_operands (1); constrain_operands (1);
preprocess_constraints (); preprocess_constraints ();
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
get_asm_operands_in_out (body, &n_outputs, &n_inputs); get_asm_operands_in_out (body, &n_outputs, &n_inputs);
......
...@@ -775,20 +775,17 @@ copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd) ...@@ -775,20 +775,17 @@ copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
if (! constrain_operands (1)) if (! constrain_operands (1))
fatal_insn_not_found (insn); fatal_insn_not_found (insn);
preprocess_constraints (); preprocess_constraints ();
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
n_ops = recog_data.n_operands; n_ops = recog_data.n_operands;
is_asm = asm_noperands (PATTERN (insn)) >= 0; is_asm = asm_noperands (PATTERN (insn)) >= 0;
/* Simplify the code below by rewriting things to reflect /* Simplify the code below by promoting OP_OUT to OP_INOUT
matching constraints. Also promote OP_OUT to OP_INOUT
in predicated instructions. */ in predicated instructions. */
predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
for (i = 0; i < n_ops; ++i) for (i = 0; i < n_ops; ++i)
{ {
int matches = op_alt[i].matches; int matches = op_alt[i].matches;
if (matches >= 0)
op_alt[i].cl = op_alt[matches].cl;
if (matches >= 0 || op_alt[i].matched >= 0 if (matches >= 0 || op_alt[i].matched >= 0
|| (predicated && recog_data.operand_type[i] == OP_OUT)) || (predicated && recog_data.operand_type[i] == OP_OUT))
recog_data.operand_type[i] = OP_INOUT; recog_data.operand_type[i] = OP_INOUT;
...@@ -939,12 +936,14 @@ copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd) ...@@ -939,12 +936,14 @@ copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
if (op_alt[i].is_address) if (op_alt[i].is_address)
replaced[i] replaced[i]
= replace_oldest_value_addr (recog_data.operand_loc[i], = replace_oldest_value_addr (recog_data.operand_loc[i],
op_alt[i].cl, VOIDmode, alternative_class (op_alt, i),
ADDR_SPACE_GENERIC, insn, vd); VOIDmode, ADDR_SPACE_GENERIC,
insn, vd);
else if (REG_P (recog_data.operand[i])) else if (REG_P (recog_data.operand[i]))
replaced[i] replaced[i]
= replace_oldest_value_reg (recog_data.operand_loc[i], = replace_oldest_value_reg (recog_data.operand_loc[i],
op_alt[i].cl, insn, vd); alternative_class (op_alt, i),
insn, vd);
else if (MEM_P (recog_data.operand[i])) else if (MEM_P (recog_data.operand[i]))
replaced[i] = replace_oldest_value_mem (recog_data.operand[i], replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
insn, vd); insn, vd);
......
...@@ -1427,7 +1427,7 @@ hide_operands (int n_ops, rtx *old_operands, rtx *old_dups, ...@@ -1427,7 +1427,7 @@ hide_operands (int n_ops, rtx *old_operands, rtx *old_dups,
unsigned HOST_WIDE_INT do_not_hide, bool inout_and_ec_only) unsigned HOST_WIDE_INT do_not_hide, bool inout_and_ec_only)
{ {
int i; int i;
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
for (i = 0; i < n_ops; i++) for (i = 0; i < n_ops; i++)
{ {
old_operands[i] = recog_data.operand[i]; old_operands[i] = recog_data.operand[i];
...@@ -1478,7 +1478,7 @@ static void ...@@ -1478,7 +1478,7 @@ static void
record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info) record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info)
{ {
int n_ops = recog_data.n_operands; int n_ops = recog_data.n_operands;
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
int i; int i;
...@@ -1489,7 +1489,7 @@ record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info) ...@@ -1489,7 +1489,7 @@ record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info)
? recog_data.operand_loc[opn] ? recog_data.operand_loc[opn]
: recog_data.dup_loc[i - n_ops]); : recog_data.dup_loc[i - n_ops]);
rtx op = *loc; rtx op = *loc;
enum reg_class cl = op_alt[opn].cl; enum reg_class cl = alternative_class (op_alt, opn);
struct du_head *prev_open; struct du_head *prev_open;
...@@ -1571,7 +1571,7 @@ build_def_use (basic_block bb) ...@@ -1571,7 +1571,7 @@ build_def_use (basic_block bb)
if (! constrain_operands (1)) if (! constrain_operands (1))
fatal_insn_not_found (insn); fatal_insn_not_found (insn);
preprocess_constraints (); preprocess_constraints ();
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
n_ops = recog_data.n_operands; n_ops = recog_data.n_operands;
untracked_operands = 0; untracked_operands = 0;
...@@ -1584,8 +1584,7 @@ build_def_use (basic_block bb) ...@@ -1584,8 +1584,7 @@ build_def_use (basic_block bb)
sizeof (operand_rr_info) * recog_data.n_operands); sizeof (operand_rr_info) * recog_data.n_operands);
} }
/* Simplify the code below by rewriting things to reflect /* Simplify the code below by promoting OP_OUT to OP_INOUT in
matching constraints. Also promote OP_OUT to OP_INOUT in
predicated instructions, but only for register operands predicated instructions, but only for register operands
that are already tracked, so that we can create a chain that are already tracked, so that we can create a chain
when the first SET makes a register live. */ when the first SET makes a register live. */
...@@ -1595,8 +1594,6 @@ build_def_use (basic_block bb) ...@@ -1595,8 +1594,6 @@ build_def_use (basic_block bb)
{ {
rtx op = recog_data.operand[i]; rtx op = recog_data.operand[i];
int matches = op_alt[i].matches; int matches = op_alt[i].matches;
if (matches >= 0)
op_alt[i].cl = op_alt[matches].cl;
if (matches >= 0 || op_alt[i].matched >= 0 if (matches >= 0 || op_alt[i].matched >= 0
|| (predicated && recog_data.operand_type[i] == OP_OUT)) || (predicated && recog_data.operand_type[i] == OP_OUT))
{ {
...@@ -1681,7 +1678,7 @@ build_def_use (basic_block bb) ...@@ -1681,7 +1678,7 @@ build_def_use (basic_block bb)
rtx *loc = (i < n_ops rtx *loc = (i < n_ops
? recog_data.operand_loc[opn] ? recog_data.operand_loc[opn]
: recog_data.dup_loc[i - n_ops]); : recog_data.dup_loc[i - n_ops]);
enum reg_class cl = op_alt[opn].cl; enum reg_class cl = alternative_class (op_alt, opn);
enum op_type type = recog_data.operand_type[opn]; enum op_type type = recog_data.operand_type[opn];
/* Don't scan match_operand here, since we've no reg class /* Don't scan match_operand here, since we've no reg class
......
...@@ -1022,14 +1022,7 @@ get_reg_class (rtx insn) ...@@ -1022,14 +1022,7 @@ get_reg_class (rtx insn)
preprocess_constraints (); preprocess_constraints ();
n_ops = recog_data.n_operands; n_ops = recog_data.n_operands;
operand_alternative *op_alt = which_op_alt (); const operand_alternative *op_alt = which_op_alt ();
for (i = 0; i < n_ops; ++i)
{
int matches = op_alt[i].matches;
if (matches >= 0)
op_alt[i].cl = op_alt[matches].cl;
}
if (asm_noperands (PATTERN (insn)) > 0) if (asm_noperands (PATTERN (insn)) > 0)
{ {
for (i = 0; i < n_ops; i++) for (i = 0; i < n_ops; i++)
...@@ -1037,7 +1030,7 @@ get_reg_class (rtx insn) ...@@ -1037,7 +1030,7 @@ get_reg_class (rtx insn)
{ {
rtx *loc = recog_data.operand_loc[i]; rtx *loc = recog_data.operand_loc[i];
rtx op = *loc; rtx op = *loc;
enum reg_class cl = op_alt[i].cl; enum reg_class cl = alternative_class (op_alt, i);
if (REG_P (op) if (REG_P (op)
&& REGNO (op) == ORIGINAL_REGNO (op)) && REGNO (op) == ORIGINAL_REGNO (op))
...@@ -1051,7 +1044,7 @@ get_reg_class (rtx insn) ...@@ -1051,7 +1044,7 @@ get_reg_class (rtx insn)
for (i = 0; i < n_ops + recog_data.n_dups; i++) for (i = 0; i < n_ops + recog_data.n_dups; i++)
{ {
int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
enum reg_class cl = op_alt[opn].cl; enum reg_class cl = alternative_class (op_alt, opn);
if (recog_data.operand_type[opn] == OP_OUT || if (recog_data.operand_type[opn] == OP_OUT ||
recog_data.operand_type[opn] == OP_INOUT) recog_data.operand_type[opn] == OP_INOUT)
......
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