SIMD operations like combine prefer to have their operands in FP registers,
so increase the cost of integer registers slightly to avoid unnecessary int<->FP moves. This improves register allocation of scalar SIMD operations. * config/aarch64/aarch64-simd.md (aarch64_combinez): Add ? to integer variant. (aarch64_combinez_be): Likewise. From-SVN: r236770
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