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riscv-gcc-1
Commit 5dfebe0a by Eric Botcazou
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re PR rtl-optimization/44659 (Combiner fails to match QI cmp patterns with upper 8bit register) 

	PR rtl-optimization/44659
	* combine.c (make_compound_operation) <SUBREG>: Do not return the
	result of force_to_mode if it partially re-expanded the compound.

From-SVN: r161523
parent 4f036d9b
Showing with 152 additions and 21 deletions
gcc/ChangeLog
2010-06-29 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/44659
* combine.c (make_compound_operation) <SUBREG>: Do not return the
result of force_to_mode if it partially re-expanded the compound.
2010-06-28 Jan Hubicka <jh@suse.cz>
PR middle-end/44671
* ipa-split.c (test_nonssa_use, mark_nonssa_use): Check also uses of RESULT_DECL.
* ipa-split.c (test_nonssa_use, mark_nonssa_use): Check also uses of
RESULT_DECL.
2010-06-28 Anatoly Sokolov <aesok@post.ru>
......@@ -22,7 +29,7 @@
fold_unary_loc, fold_negate_const, fold_abs_const, fold_not_const,
round_up_loc): Adjust call to force_fit_type_double.
2010-06-28 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2010-06-28 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* config/rs6000/rs6000.h (PROCESSOR_TITAN): Declare.
......@@ -62,7 +69,7 @@
* ipa-inline.c (add_new_edges_to_heap): Do not add edges to uninlinable
functions.
2010-06-28 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2010-06-28 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* config.gcc (powerpc*-*-*): Handle titan.
* config/rs6000/rs6000.c (titan_cost): New costs.
......@@ -104,7 +111,7 @@
* omp-low.c (maybe_catch_exception): Likewise.
* Makefile.in: Update dependencies.
2010-06-28 Bingfeng Mei <bmei@broadcom.com>
2010-06-28 Bingfeng Mei <bmei@broadcom.com>
* cgraph.h (struct varpool_node): new used_from_object_file flag.
(struct cgraph_local_info): new used_from_object_file flag.
......@@ -132,8 +139,8 @@
PR middle-end/44671
PR middle-end/44686
* tree.c (build_function_decl_skip_args): Clear DECL_BUILT_IN on signature
change.
* tree.c (build_function_decl_skip_args): Clear DECL_BUILT_IN on
signature change.
* ipa-split.c (split_function): Always clear DECL_BUILT_IN.
* ipa-prop.c (ipa_modify_formal_parameters): Likewise.
......@@ -501,8 +508,8 @@
functions for dealing with three-operand statements.
* tree.c (commutative_ternary_tree_code): New function.
* tree.h (commutative_ternary_tree_code): Declare it.
* tree-vrp.c (gimple_assign_nonnegative_warnv_p): Return false for ternary
statements.
* tree-vrp.c (gimple_assign_nonnegative_warnv_p): Return false for
ternary statements.
(gimple_assign_nonzero_warnv_p): Likewise.
* tree-ssa-sccvn.c (stmt_has_constants): Handle GIMPLE_TERNARY_RHS.
* tree-ssa-ccp.c (get_rhs_assign_op_for_ccp): New static function.
......@@ -3050,7 +3057,7 @@
* tree-inline.c (expand_call_inline): Pass translated return value of
cgraph_inline_failed_string to diagnostic function.
2010-06-08 Andrew Pinski <pinskia@gmail.com>
2010-06-08 Andrew Pinski <pinskia@gmail.com>
Shujing Zhao <pearly.zhao@oracle.com>
PR c/37724
......
gcc/combine.c
......@@ -7277,22 +7277,21 @@ make_compound_operation (rtx x, enum rtx_code in_code)
/* Call ourselves recursively on the inner expression. If we are
narrowing the object and it has a different RTL code from
what it originally did, do this SUBREG as a force_to_mode. */
tem = make_compound_operation (SUBREG_REG (x), in_code);
{
rtx simplified = simplify_subreg (mode, tem, GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
rtx inner = SUBREG_REG (x), simplified;
tem = make_compound_operation (inner, in_code);
simplified
= simplify_subreg (mode, tem, GET_MODE (inner), SUBREG_BYTE (x));
if (simplified)
tem = simplified;
if (GET_CODE (tem) != GET_CODE (SUBREG_REG (x))
&& GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
if (GET_CODE (tem) != GET_CODE (inner)
&& GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (inner))
&& subreg_lowpart_p (x))
{
rtx newer = force_to_mode (tem, mode, ~(HOST_WIDE_INT) 0,
0);
rtx newer = force_to_mode (tem, mode, ~(HOST_WIDE_INT) 0, 0);
/* If we have something other than a SUBREG, we might have
done an expansion, so rerun ourselves. */
......@@ -7300,9 +7299,16 @@ make_compound_operation (rtx x, enum rtx_code in_code)
newer = make_compound_operation (newer, in_code);
/* force_to_mode can expand compounds. If it just re-expanded the
compound use gen_lowpart instead to convert to the desired
mode. */
if (rtx_equal_p (newer, x))
compound, use gen_lowpart to convert to the desired mode. */
if (rtx_equal_p (newer, x)
/* Likewise if it re-expanded the compound only partially.
This happens for SUBREG of ZERO_EXTRACT if they extract
the same number of bits. */
|| (GET_CODE (newer) == SUBREG
&& (GET_CODE (SUBREG_REG (newer)) == LSHIFTRT
|| GET_CODE (SUBREG_REG (newer)) == ASHIFTRT)
&& GET_CODE (inner) == AND
&& rtx_equal_p (SUBREG_REG (newer), XEXP (inner, 0))))
return gen_lowpart (GET_MODE (x), tem);
return newer;
......
gcc/testsuite/ChangeLog
2010-06-29 H.J. Lu <hongjiu.lu@intel.com>
PR rtl-optimization/44659
* gcc.target/i386/extract-1.c: New.
* gcc.target/i386/extract-2.c: Likewise.
* gcc.target/i386/extract-3.c: Likewise.
* gcc.target/i386/extract-4.c: Likewise.
* gcc.target/i386/extract-5.c: Likewise.
* gcc.target/i386/extract-6.c: Likewise.
2010-06-28 Jakub Jelinek <jakub@redhat.com>
PR c++/44682
......
gcc/testsuite/gcc.target/i386/extract-1.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O2 -mtune=generic" } */
int
foo (unsigned char x, unsigned char y)
{
return (x % y) != 0;
}
/* { dg-final { scan-assembler-not "test\[b\]?\[^\\n\]*%\[a-d\]l" } } */
gcc/testsuite/gcc.target/i386/extract-2.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O2 -mtune=generic" } */
int
foo (unsigned char x, unsigned char y)
{
return (x % y) > 4;
}
/* { dg-final { scan-assembler-times "cmp\[b\]?\[^\\n\]*%\[a-d\]h" 1 } } */
/* { dg-final { scan-assembler-not "cmp\[b\]?\[^\\n\]*%\[a-d\]l" } } */
gcc/testsuite/gcc.target/i386/extract-3.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O2 -mtune=generic" } */
typedef struct
{
unsigned char c1;
unsigned char c2;
unsigned char c3;
unsigned char c4;
} foo_t;
int
#ifndef __x86_64__
__attribute__((regparm(3)))
#endif
foo (foo_t x)
{
return x.c2 != 0;
}
/* { dg-final { scan-assembler-not "test\[b\]?\[^\\n\]*%\[a-z0-9\]+l" } } */
gcc/testsuite/gcc.target/i386/extract-4.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O2 -mtune=generic" } */
typedef struct
{
unsigned char c1;
unsigned char c2;
unsigned char c3;
unsigned char c4;
} foo_t;
int
#ifndef __x86_64__
__attribute__((regparm(3)))
#endif
foo (foo_t x)
{
return x.c2 > 4;
}
/* { dg-final { scan-assembler-times "cmp\[b\]?\[^\\n\]*%\[a-z0-9\]+h" 1 } } */
/* { dg-final { scan-assembler-not "cmp\[b\]?\[^\\n\]*%\[a-z0-9\]+l" } } */
gcc/testsuite/gcc.target/i386/extract-5.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O2 -mtune=generic" } */
typedef struct
{
unsigned int c1:8;
unsigned int c2:8;
unsigned int c3:8;
unsigned int c4:8;
} foo_t;
int
#ifndef __x86_64__
__attribute__((regparm(3)))
#endif
foo (foo_t x)
{
return x.c2 != 0;
}
/* { dg-final { scan-assembler-not "test\[b\]?\[^\\n\]*%\[a-z0-9\]+l" } } */
gcc/testsuite/gcc.target/i386/extract-6.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O2 -mtune=generic" } */
typedef struct
{
unsigned int c1:8;
unsigned int c2:8;
unsigned int c3:8;
unsigned int c4:8;
} foo_t;
int
#ifndef __x86_64__
__attribute__((regparm(3)))
#endif
foo (foo_t x)
{
return x.c2 > 4;
}
/* { dg-final { scan-assembler-times "cmp\[b\]?\[^\\n\]*%\[a-z0-9\]+h" 1 } } */
/* { dg-final { scan-assembler-not "cmp\[b\]?\[^\\n\]*%\[a-z0-9\]+l" } } */
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