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lvzhengyang
riscv-gcc-1
Commits
5b8ae21f
Commit
5b8ae21f
authored
May 08, 1998
by
Michael Meissner
Committed by
Michael Meissner
May 08, 1998
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Hunk of m32r changes
From-SVN: r19636
parent
cf879efa
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4 changed files
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141 additions
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48 deletions
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-48
gcc/ChangeLog
+48
-0
gcc/config/m32r/m32r.c
+0
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gcc/config/m32r/m32r.h
+93
-48
gcc/config/m32r/m32r.md
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gcc/ChangeLog
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5b8ae21f
...
...
@@ -3,6 +3,54 @@ Fri May 8 18:23:08 1998 Michael Meissner <meissner@cygnus.com>
* final.c (final_scan_insn): Call fatal_insn instead of abort if
we could not split an insn when required to.
* m32r.md ({add,sub}di3): Add define_splits and appropriate low
level insns.
(peepholes): Disable peepholes that call dead_or_set_p.
(movsi): Rewrite to handle addresses better after last change.
Add define_split to split load of addresses in large/medium modes.
(prologue): Call m32r_expand_prologue.
(movsi_{push,pop}): Generators for push/pop.
(movsi): Support PRE_{INC,DEC}, POST_INC.
(mov{di,df}): Rewrite. Always split the insns.
(movsf): Add define_split to get register load in correct mode.
(cmp_ne_small_const_insn): Use 'N' instead of 'S' constraint.
(attributes): Rewrite attributes so that type indicates both the
type and the length of the insn directly.
(all insns): Change to use new type attributes.
(debug): New attribute to convey whether -mdebug was used.
(opt_space): New attribute to convey whether -Os was used.
(function units): Loads are 3 cycles, not 2. Better classify all
insns into short/long.
(load/store/extend insns): Add separate case for load/store
indirect operations without an offset.
(divsi3): Division is a long operation, not short.
* m32r.h (LEGITIMATE_LO_SUM_ADDRESS_P): Do not allow LO_SUM for
modes > 1 word.
(GO_IF_MODE_DEPENDENT_ADDRESS): LO_SUM is now mode dependent.
(CONST_OK_FOR_LETTER_P): Make 'N' handle reverse 8 bit compares.
(EXTRA_CONSTRAINT): Remove 'S' special support. Add 'U' for
operands with PRE_{INC,DEC}, POST_INC.
(FUNCTION_PROFILER): Call abort instead of doing nothing.
(GO_IF_LEGITIMATE_ADDRESS): Allow PRE_{INC,DEC}, POST_INC of
SImode variables.
(gen_split_move_double): Declare.
(EXTRA_CONSTRAINT): Add 'T' for memory reference with no offset.
* m32r.c (gen_split_move_double): Fix typo. Also, don't call
emit_move_insn, build up SET's directly.
(toplevel): Include system.h, not stdio.h.
(move_double_src_operand): Allow any DF or DI mode constant.
(gen_split_move_double): Split moves of DI or DF values into the
appropriate moves, loads, or stores. Don't handle use of auto
inc/dec if using dead index. Do handle overlapping moves, etc.
(m32r_frame_info): Remove prologue_size field.
(m32r_compute_frame_size): Don't calculate prologue size.
(m32r_output_function_prologue): Change to pretty much a NOP.
(m32r_expand_prologue): Expand prologue as a series of INSNs.
(m32r_print_operand): Add support for PRE_{INC,DEC}, POST_INC.
(m32r_print_operand_address): Ditto.
Fri May 8 14:13:21 1998 H.J. Lu (hjl@gnu.org)
* reload1.c (emit_reload_insns): When performing expensive
...
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gcc/config/m32r/m32r.c
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5b8ae21f
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gcc/config/m32r/m32r.h
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5b8ae21f
...
...
@@ -606,16 +606,17 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
#define INT32_P(X) ((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \
&& (X) <= (unsigned HOST_WIDE_INT) 0xffffffff)
#define UINT5_P(X) ((unsigned) (X) < 32)
#define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128)
#define CONST_OK_FOR_LETTER_P(VALUE, C)
\
((C) == 'I' ? INT8_P (VALUE) \
: (C) == 'J' ? INT16_P (VALUE) \
: (C) == 'K' ? UINT16_P (VALUE) \
: (C) == 'L' ? UPPER16_P (VALUE) \
: (C) == 'M' ? UINT24_P (VALUE) \
: (C) == 'N' ? IN
T32_P (VALUE)
\
: (C) == 'O' ? UINT5_P (VALUE) \
: (C) == 'P' ? CMP_INT16_P (VALUE) \
#define CONST_OK_FOR_LETTER_P(VALUE, C)
\
((C) == 'I' ? INT8_P (VALUE)
\
: (C) == 'J' ? INT16_P (VALUE)
\
: (C) == 'K' ? UINT16_P (VALUE)
\
: (C) == 'L' ? UPPER16_P (VALUE)
\
: (C) == 'M' ? UINT24_P (VALUE)
\
: (C) == 'N' ? IN
VERTED_SIGNED_8BIT (VALUE)
\
: (C) == 'O' ? UINT5_P (VALUE)
\
: (C) == 'P' ? CMP_INT16_P (VALUE)
\
: 0)
/* Similar, but for floating constants, and defining letters G and H.
...
...
@@ -623,8 +624,8 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
For the m32r, handle a few constants inline.
??? We needn't treat DI and DF modes differently, but for now we do. */
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' ? easy_di_const (VALUE)
\
: (C) == 'H' ? easy_df_const (VALUE)
\
((C) == 'G' ? easy_di_const (VALUE)
\
: (C) == 'H' ? easy_df_const (VALUE)
\
: 0)
/* A C expression that defines the optional machine-dependent constraint
...
...
@@ -635,19 +636,25 @@ extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
be 0 regardless of VALUE. */
/* Q is for symbolic addresses loadable with ld24.
R is for symbolic addresses when ld24 can't be used.
S is for an 8 bit signed integer in the range +128 to -127 */
#define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128)
#define EXTRA_CONSTRAINT(VALUE, C) \
((C) == 'Q' \
? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \
|| addr24_operand (VALUE, VOIDmode)) \
: (C) == 'R' \
? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \
|| addr32_operand (VALUE, VOIDmode)) \
: (C) == 'S' \
? ((GET_CODE (VALUE) == CONST_INT) && INVERTED_SIGNED_8BIT (INTVAL (VALUE))) \
S is unused.
T is for indirect of a pointer.
U is for pushes and pops of the stack pointer. */
#define EXTRA_CONSTRAINT(VALUE, C) \
((C) == 'Q' \
? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \
|| addr24_operand (VALUE, VOIDmode)) \
: (C) == 'R' \
? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \
|| addr32_operand (VALUE, VOIDmode)) \
: (C) == 'S' \
? 0 \
: (C) == 'T' \
? (GET_CODE (VALUE) == MEM \
&& memreg_operand (VALUE, GET_MODE (VALUE))) \
: (C) == 'U' \
? (GET_CODE (VALUE) == MEM \
&& PUSH_POP_P (GET_MODE (VALUE), XEXP (VALUE, 0))) \
: 0)
/* Stack layout and stack pointer usage. */
...
...
@@ -1069,7 +1076,7 @@ m32r_output_function_epilogue (FILE, SIZE)
/* Output assembler code to FILE to increment profiler label # LABELNO
for profiling a function entry. */
#define FUNCTION_PROFILER(FILE, LABELNO)
#define FUNCTION_PROFILER(FILE, LABELNO)
abort ()
/* Trampolines. */
...
...
@@ -1184,24 +1191,37 @@ do { \
(GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))
/* local to this file */
#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X)
\
(GET_CODE (X) == PLUS \
&& RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X)
\
(GET_CODE (X) == PLUS
\
&& RTX_OK_FOR_BASE_P (XEXP (X, 0))
\
&& RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))
/* local to this file */
#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
(GET_CODE (X) == LO_SUM \
&& RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
/* For LO_SUM addresses, do not allow them if the MODE is > 1 word,
since more than one instruction will be required. */
#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
(GET_CODE (X) == LO_SUM \
&& (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
&& RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
&& CONSTANT_P (XEXP (X, 1)))
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ if (RTX_OK_FOR_BASE_P (X)) \
goto ADDR; \
if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
goto ADDR; \
if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \
goto ADDR; \
/* local to this file */
/* Memory address that is a push/pop of the stack pointer. */
#define PUSH_POP_P(MODE, X) \
((MODE) == SImode \
&& (GET_CODE (X) == POST_INC \
|| GET_CODE (X) == PRE_INC \
|| GET_CODE (X) == PRE_DEC))
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ if (RTX_OK_FOR_BASE_P (X)) \
goto ADDR; \
if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
goto ADDR; \
if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \
goto ADDR; \
if (PUSH_POP_P ((MODE), (X))) \
goto ADDR; \
}
/* Try machine-dependent ways of modifying an illegitimate address
...
...
@@ -1223,14 +1243,13 @@ do { \
/* Go to LABEL if ADDR (a legitimate address expression)
has an effect that depends on the machine mode it is used for. */
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
do { \
if (GET_CODE (ADDR) == PRE_DEC) \
goto LABEL; \
if (GET_CODE (ADDR) == PRE_INC) \
goto LABEL; \
if (GET_CODE (ADDR) == POST_INC) \
goto LABEL; \
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
do { \
if (GET_CODE (ADDR) == PRE_DEC \
|| GET_CODE (ADDR) == PRE_INC \
|| GET_CODE (ADDR) == POST_INC \
|| GET_CODE (ADDR) == LO_SUM) \
goto LABEL; \
} while (0)
/* Condition code usage. */
...
...
@@ -1286,7 +1305,7 @@ do { \
/* Compute the cost of moving data between registers and memory. */
/* Memory is 3 times as expensive as registers.
??? Is that the right way to look at it? */
#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
#define MEMORY_MOVE_COST(MODE,CLASS,IN
_P
) \
(GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
/* The cost of a branch insn. */
...
...
@@ -1355,7 +1374,10 @@ do { \
#define HAIFA_P 0
#endif
/* Indicate how many instructions can be issued at the same time. */
/* Indicate how many instructions can be issued at the same time.
This is 1/2 of a lie. The m32r can issue only 1 long insn at
once, but 2. However doing so allows the scheduler to group
the two short insns together. */
#define ISSUE_RATE 2
/* When the `length' insn attribute is used, this macro specifies the
...
...
@@ -1635,6 +1657,27 @@ do { \
fprintf (FILE, "%s%s", USER_LABEL_PREFIX, real_name); \
} while (0)
/* CYGNUS LOCAL -- m32rx/meissner */
/* For the m32r if -Os, don't force line number label to begin
at the beginning of the word. */
#undef ASM_OUTPUT_SOURCE_LINE
#define ASM_OUTPUT_SOURCE_LINE(file, line) \
do \
{ \
static int sym_lineno = 1; \
fprintf (file, ".stabn 68,0,%d,.LM%d-", \
line, sym_lineno); \
assemble_name (file, \
XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));\
fprintf (file, \
(optimize_size) ? "\n\t.debugsym .LM%d\n" : "\n.LM%d:\n", \
sym_lineno); \
sym_lineno += 1; \
} \
while (0)
/* END CYGNUS LOCAL -- m32rx/meissner */
/* Store in OUTPUT a string (made with alloca) containing
an assembler-name for a local static variable named NAME.
LABELNO is an integer which is different for each call. */
...
...
@@ -1998,6 +2041,7 @@ extern int small_insn_p PROTO((Rtx, int));
extern
int
large_insn_p
PROTO
((
Rtx
,
int
));
extern
int
m32r_select_cc_mode
PROTO
((
int
,
Rtx
,
Rtx
));
extern
Rtx
gen_compare
PROTO
((
int
,
Rtx
,
Rtx
,
int
));
extern
Rtx
gen_split_move_double
PROTO
((
Rtx
*
));
extern
int
function_arg_partial_nregs
PROTO
((
CUMULATIVE_ARGS
*
,
int
,
Tree
,
int
));
extern
void
m32r_setup_incoming_varargs
PROTO
((
CUMULATIVE_ARGS
*
,
...
...
@@ -2008,6 +2052,7 @@ extern enum m32r_function_type m32r_compute_function_type
PROTO
((
Tree
));
extern
unsigned
m32r_compute_frame_size
PROTO
((
int
));
extern
int
m32r_first_insn_address
PROTO
((
void
));
extern
void
m32r_expand_prologue
PROTO
((
void
));
extern
void
m32r_output_function_prologue
STDIO_PROTO
((
FILE
*
,
int
));
extern
void
m32r_output_function_epilogue
STDIO_PROTO
((
FILE
*
,
int
));
extern
void
m32r_finalize_pic
PROTO
((
void
));
...
...
gcc/config/m32r/m32r.md
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