Commit 5b1ebbca by Segher Boessenkool Committed by Segher Boessenkool

rs6000: Sanitize vector modes

This removes the vector modes that were only used by SPE.  It also
rearranges things so it is easier to see what is there, and for what.


	* config/rs6000/rs6000-modes.def: Remove all 8-byte vector modes
	except V2SF and V2SI.  Rearrange the vector modes, and add comments.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Remove V8QImode
	and V4HImode.
	(reg_offset_addressing_ok_p): Remove V4HImode and V1DImode.
	(rs6000_legitimate_offset_address_p): Ditto.
	(rs6000_emit_move): Ditto.
	(rs6000_init_builtins): Remove V4HI_type_node.

From-SVN: r249162
parent 78a88fb6
2017-06-13 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000-modes.def: Remove all 8-byte vector modes
except V2SF and V2SI. Rearrange the vector modes, and add comments.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Remove V8QImode
and V4HImode.
(reg_offset_addressing_ok_p): Remove V4HImode and V1DImode.
(rs6000_legitimate_offset_address_p): Ditto.
(rs6000_emit_move): Ditto.
(rs6000_init_builtins): Remove V4HI_type_node.
2017-06-13 Martin Liska <mliska@suse.cz>
PR sanitize/78204
......
......@@ -41,15 +41,20 @@ CC_MODE (CCFP);
CC_MODE (CCEQ);
/* Vector modes. */
VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
/* VMX/VSX. */
VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */
VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */
VECTOR_MODE (INT, DI, 1);
VECTOR_MODE (INT, TI, 1);
VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */
VECTOR_MODE (INT, TI, 1); /* V1TI */
VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */
/* Two VMX/VSX vectors (for permute, select, concat, etc.) */
VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */
VECTOR_MODES (FLOAT, 32); /* V16HF V8SF V4DF */
/* Paired single. */
VECTOR_MODE (FLOAT, SF, 2); /* The only valid paired-single mode. */
VECTOR_MODE (INT, SI, 2); /* For paired-single permutes. */
/* Replacement for TImode that only is allowed in GPRs. We also use PTImode
for quad memory atomic operations to force getting an even/odd register
combination. */
......
......@@ -2450,8 +2450,6 @@ rs6000_debug_reg_global (void)
SDmode,
DDmode,
TDmode,
V8QImode,
V4HImode,
V2SImode,
V16QImode,
V8HImode,
......@@ -8490,9 +8488,7 @@ reg_offset_addressing_ok_p (machine_mode mode)
return mode_supports_vsx_dform_quad (mode);
break;
case V4HImode:
case V2SImode:
case V1DImode:
case V2SFmode:
/* Paired vector modes. Only reg+reg addressing is valid. */
if (TARGET_PAIRED_FLOAT)
......@@ -8730,9 +8726,7 @@ rs6000_legitimate_offset_address_p (machine_mode mode, rtx x,
extra = 0;
switch (mode)
{
case V4HImode:
case V2SImode:
case V1DImode:
case V2SFmode:
/* SPE vector modes. */
return SPE_CONST_OFFSET_OK (offset);
......@@ -10981,10 +10975,8 @@ rs6000_emit_move (rtx dest, rtx source, machine_mode mode)
case V8HImode:
case V4SFmode:
case V4SImode:
case V4HImode:
case V2SFmode:
case V2SImode:
case V1DImode:
case V2DFmode:
case V2DImode:
case V1TImode:
......@@ -16843,7 +16835,6 @@ rs6000_init_builtins (void)
: "__vector long long",
intDI_type_node, 2);
V2DF_type_node = rs6000_vector_type ("__vector double", double_type_node, 2);
V4HI_type_node = build_vector_type (intHI_type_node, 4);
V4SI_type_node = rs6000_vector_type ("__vector signed int",
intSI_type_node, 4);
V4SF_type_node = rs6000_vector_type ("__vector float", float_type_node, 4);
......@@ -16991,7 +16982,6 @@ rs6000_init_builtins (void)
builtin_mode_to_type[V2DImode][0] = V2DI_type_node;
builtin_mode_to_type[V2DImode][1] = unsigned_V2DI_type_node;
builtin_mode_to_type[V2DFmode][0] = V2DF_type_node;
builtin_mode_to_type[V4HImode][0] = V4HI_type_node;
builtin_mode_to_type[V4SImode][0] = V4SI_type_node;
builtin_mode_to_type[V4SImode][1] = unsigned_V4SI_type_node;
builtin_mode_to_type[V4SFmode][0] = V4SF_type_node;
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