Commit 5ae46837 by Kirill Yukhin Committed by Kirill Yukhin

i386. Extend static buffers. Fix SF mode operand constraint to `Yv' in storehpd pattern.

gcc/
        * gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
	array to 128 chars.
	(define_insn "*andnottf3"): Ditto.
	(define_insn "*<code><mode>3"/any_logic): Ditto.
	(define_insn "*<code>tf3"/any_logic): Ditto.
	(define_insn "sse2_storehpd"): Use Yv constraint for scalar
	operand to block AVX-512VL insn variant emit when it is not enabled.

From-SVN: r236364
parent 18894060
2016-05-18 Kirill Yukhin <kirill.yukhin@intel.com> 2016-05-18 Kirill Yukhin <kirill.yukhin@intel.com>
* gcc/config/i386/sse.md (define_insn "*andnot<mode>3"): Extend static
array to 128 chars.
(define_insn "*andnottf3"): Ditto.
(define_insn "*<code><mode>3"/any_logic): Ditto.
(define_insn "*<code>tf3"/any_logic): Ditto.
(define_insn "sse2_storehpd"): Use Yv constraint for scalar
operand to block AVX-512VL insn variant emit when it is not enabled.
2016-05-18 Kirill Yukhin <kirill.yukhin@intel.com>
* config/i386/sse.md (define_insn "*vec_concatv2sf_sse4_1"): Use 'Yv' * config/i386/sse.md (define_insn "*vec_concatv2sf_sse4_1"): Use 'Yv'
constraint fot SF mode. constraint fot SF mode.
......
...@@ -3027,7 +3027,7 @@ ...@@ -3027,7 +3027,7 @@
(match_operand:MODEF 2 "register_operand" "x,x,v,v")))] (match_operand:MODEF 2 "register_operand" "x,x,v,v")))]
"SSE_FLOAT_MODE_P (<MODE>mode)" "SSE_FLOAT_MODE_P (<MODE>mode)"
{ {
static char buf[32]; static char buf[128];
const char *ops; const char *ops;
const char *suffix const char *suffix
= (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "<ssevecmodesuffix>"; = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "<ssevecmodesuffix>";
...@@ -3094,7 +3094,7 @@ ...@@ -3094,7 +3094,7 @@
(match_operand:TF 2 "vector_operand" "xBm,xm,vm,v")))] (match_operand:TF 2 "vector_operand" "xBm,xm,vm,v")))]
"TARGET_SSE" "TARGET_SSE"
{ {
static char buf[32]; static char buf[128];
const char *ops; const char *ops;
const char *tmp const char *tmp
= (which_alternative >= 2 ? "pandnq" = (which_alternative >= 2 ? "pandnq"
...@@ -3150,7 +3150,7 @@ ...@@ -3150,7 +3150,7 @@
(match_operand:MODEF 2 "register_operand" "x,x,v,v")))] (match_operand:MODEF 2 "register_operand" "x,x,v,v")))]
"SSE_FLOAT_MODE_P (<MODE>mode)" "SSE_FLOAT_MODE_P (<MODE>mode)"
{ {
static char buf[32]; static char buf[128];
const char *ops; const char *ops;
const char *suffix const char *suffix
= (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "<ssevecmodesuffix>"; = (get_attr_mode (insn) == MODE_V4SF) ? "ps" : "<ssevecmodesuffix>";
...@@ -3225,7 +3225,7 @@ ...@@ -3225,7 +3225,7 @@
"TARGET_SSE "TARGET_SSE
&& ix86_binary_operator_ok (<CODE>, TFmode, operands)" && ix86_binary_operator_ok (<CODE>, TFmode, operands)"
{ {
static char buf[32]; static char buf[128];
const char *ops; const char *ops;
const char *tmp const char *tmp
= (which_alternative >= 2 ? "p<logic>q" = (which_alternative >= 2 ? "p<logic>q"
...@@ -8426,9 +8426,9 @@ ...@@ -8426,9 +8426,9 @@
;; Avoid combining registers from different units in a single alternative, ;; Avoid combining registers from different units in a single alternative,
;; see comment above inline_secondary_memory_needed function in i386.c ;; see comment above inline_secondary_memory_needed function in i386.c
(define_insn "sse2_storehpd" (define_insn "sse2_storehpd"
[(set (match_operand:DF 0 "nonimmediate_operand" "=m,x,v,x,*f,r") [(set (match_operand:DF 0 "nonimmediate_operand" "=m,x,Yv,x,*f,r")
(vec_select:DF (vec_select:DF
(match_operand:V2DF 1 "nonimmediate_operand" " v,0,v,o,o,o") (match_operand:V2DF 1 "nonimmediate_operand" " v,0, v,o,o,o")
(parallel [(const_int 1)])))] (parallel [(const_int 1)])))]
"TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@ "@
......
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