re PR middle-end/26379 (ICE on vector shift RTL simplification)

	PR middle-end/26379
	* combine.c (simplify_shift_const_1): Disable nested shifts
	optimization for vector shifts.

	* gcc.target/i386/mmx-7.c: New test.

From-SVN: r111328

gcc/ChangeLog

+2006-02-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/26379
+	* combine.c (simplify_shift_const_1): Disable nested shifts
+	optimization for vector shifts.
+
 2006-02-20  Roger Sayle  <roger@eyesopen.com>
 
 	PR tree-optimization/26361

gcc/combine.c

@@ -8737,7 +8737,8 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode,
 	      && INTVAL (XEXP (varop, 1)) >= 0
 	      && INTVAL (XEXP (varop, 1)) < GET_MODE_BITSIZE (GET_MODE (varop))
 	      && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT
-	      && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
+	      && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
+	      && !VECTOR_MODE_P (result_mode))
 	    {
 	      enum rtx_code first_code = GET_CODE (varop);
 	      unsigned int first_count = INTVAL (XEXP (varop, 1));

gcc/testsuite/ChangeLog

+2006-02-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/26379
+	* gcc.target/i386/mmx-7.c: New test.
+
 2006-02-20  Roger Sayle  <roger@eyesopen.com>
 
 	PR tree-optimization/26361

gcc/testsuite/gcc.target/i386/mmx-7.c

+/* PR middle-end/26379 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mmmx" } */
+
+#include <mmintrin.h>
+
+void
+foo (__m64 *p)
+{
+  __m64 m;
+
+  m = p[0];
+  m = _mm_srli_pi16(m, 2);
+  m = _mm_slli_pi16(m, 8);
+
+  p[0] = m;
+  _mm_empty();
+}