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lvzhengyang
riscv-gcc-1
Commits
5a67e41f
Commit
5a67e41f
authored
Jan 15, 2004
by
Kazu Hirata
Committed by
Kazu Hirata
Jan 15, 2004
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* config/m32r/m32r.md: Remove useless calls to gen_lowpart.
From-SVN: r75944
parent
b1231017
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gcc/ChangeLog
View file @
5a67e41f
2004-01-15 Kazu Hirata <kazu@cs.umass.edu>
2004-01-15 Kazu Hirata <kazu@cs.umass.edu>
* config/m32r/m32r.md: Remove useless calls to gen_lowpart.
2004-01-15 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/coff.h: Replace Hitachi with Renesas.
* config/h8300/coff.h: Replace Hitachi with Renesas.
* config/h8300/elf.h: Likewise.
* config/h8300/elf.h: Likewise.
* config/h8300/h8300-protos.h: Likewise.
* config/h8300/h8300-protos.h: Likewise.
...
...
gcc/config/m32r/m32r.md
View file @
5a67e41f
...
@@ -839,11 +839,10 @@
...
@@ -839,11 +839,10 @@
(match_dup 3)]
(match_dup 3)]
"
"
{
{
rtx op0 = gen_lowpart (SImode, operands[0]);
rtx shift = GEN_INT (24);
rtx shift = GEN_INT (24);
operands[2] = gen_ashlsi3 (op
0, op0
, shift);
operands[2] = gen_ashlsi3 (op
erands[0], operands[0]
, shift);
operands[3] = gen_ashrsi3 (op
0, op0
, shift);
operands[3] = gen_ashrsi3 (op
erands[0], operands[0]
, shift);
}")
}")
(define_insn "extendhisi2"
(define_insn "extendhisi2"
...
@@ -865,11 +864,10 @@
...
@@ -865,11 +864,10 @@
(match_dup 3)]
(match_dup 3)]
"
"
{
{
rtx op0 = gen_lowpart (SImode, operands[0]);
rtx shift = GEN_INT (16);
rtx shift = GEN_INT (16);
operands[2] = gen_ashlsi3 (op
0, op0
, shift);
operands[2] = gen_ashlsi3 (op
erands[0], operands[0]
, shift);
operands[3] = gen_ashrsi3 (op
0, op0
, shift);
operands[3] = gen_ashrsi3 (op
erands[0], operands[0]
, shift);
}")
}")
;; Arithmetic instructions.
;; Arithmetic instructions.
...
...
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