Commit 58cbf20e by Doug Evans

sparc.c (arith11_operand): Use SPARC_SIMM11_P.

	* sparc/sparc.c (arith11_operand): Use SPARC_SIMM11_P.
	(arith10_operand): Use SPARC_SIMM10_P.

From-SVN: r11601
parent 18c5947f
...@@ -709,9 +709,9 @@ cc_arithopn (op, mode) ...@@ -709,9 +709,9 @@ cc_arithopn (op, mode)
|| GET_CODE (op) == IOR); || GET_CODE (op) == IOR);
} }
/* Return true if OP is a register, or is a CONST_INT that can fit in a 13 /* Return true if OP is a register, or is a CONST_INT that can fit in a
bit immediate field. This is an acceptable SImode operand for most 3 signed 13 bit immediate field. This is an acceptable SImode operand for
address instructions. */ most 3 address instructions. */
int int
arith_operand (op, mode) arith_operand (op, mode)
...@@ -722,9 +722,9 @@ arith_operand (op, mode) ...@@ -722,9 +722,9 @@ arith_operand (op, mode)
|| (GET_CODE (op) == CONST_INT && SMALL_INT (op))); || (GET_CODE (op) == CONST_INT && SMALL_INT (op)));
} }
/* Return true if OP is a register, or is a CONST_INT that can fit in an 11 /* Return true if OP is a register, or is a CONST_INT that can fit in a
bit immediate field. This is an acceptable SImode operand for the movcc signed 11 bit immediate field. This is an acceptable SImode operand for
instructions. */ the movcc instructions. */
int int
arith11_operand (op, mode) arith11_operand (op, mode)
...@@ -732,13 +732,12 @@ arith11_operand (op, mode) ...@@ -732,13 +732,12 @@ arith11_operand (op, mode)
enum machine_mode mode; enum machine_mode mode;
{ {
return (register_operand (op, mode) return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT || (GET_CODE (op) == CONST_INT && SPARC_SIMM11_P (INTVAL (op))));
&& ((unsigned) (INTVAL (op) + 0x400) < 0x800)));
} }
/* Return true if OP is a register, or is a CONST_INT that can fit in an 10 /* Return true if OP is a register, or is a CONST_INT that can fit in a
bit immediate field. This is an acceptable SImode operand for the movrcc signed 10 bit immediate field. This is an acceptable SImode operand for
instructions. */ the movrcc instructions. */
int int
arith10_operand (op, mode) arith10_operand (op, mode)
...@@ -746,8 +745,7 @@ arith10_operand (op, mode) ...@@ -746,8 +745,7 @@ arith10_operand (op, mode)
enum machine_mode mode; enum machine_mode mode;
{ {
return (register_operand (op, mode) return (register_operand (op, mode)
|| (GET_CODE (op) == CONST_INT || (GET_CODE (op) == CONST_INT && SPARC_SIMM10_P (INTVAL (op))));
&& ((unsigned) (INTVAL (op) + 0x200) < 0x400)));
} }
/* Return true if OP is a register, is a CONST_INT that fits in a 13 bit /* Return true if OP is a register, is a CONST_INT that fits in a 13 bit
......
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