Commit 58ca6edf by Richard Henderson Committed by Richard Henderson

re PR target/60562 (FAIL: gcc.target/i386/excess-precision-3.c execution test after r208587)

PR target/60562

        * config/i386/i386.md (*float<SWI48x><MODEF>2_i387): Move down to
        be shadowed by *float<SWI48><MODEF>2_sse.  Test X87_ENABLE_FLOAT.

From-SVN: r208662
parent 7485aeea
2014-03-18 Richard Henderson <rth@redhat.com>
PR target/60562
* config/i386/i386.md (*float<SWI48x><MODEF>2_i387): Move down to
be shadowed by *float<SWI48><MODEF>2_sse. Test X87_ENABLE_FLOAT.
2014-03-18 Basile Starynkevitch <basile@starynkevitch.net> 2014-03-18 Basile Starynkevitch <basile@starynkevitch.net>
......
...@@ -4701,15 +4701,6 @@ ...@@ -4701,15 +4701,6 @@
} }
}) })
(define_insn "*float<SWI48x:mode><MODEF:mode>2_i387"
[(set (match_operand:MODEF 0 "register_operand" "=f")
(float:MODEF (match_operand:SWI48x 1 "nonimmediate_operand" "m")))]
"TARGET_80387 && !(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)"
"fild%Z1\t%1"
[(set_attr "type" "fmov")
(set_attr "mode" "<MODEF:MODE>")
(set_attr "fp_int_src" "true")])
(define_insn "*float<SWI48:mode><MODEF:mode>2_sse" (define_insn "*float<SWI48:mode><MODEF:mode>2_sse"
[(set (match_operand:MODEF 0 "register_operand" "=f,x,x") [(set (match_operand:MODEF 0 "register_operand" "=f,x,x")
(float:MODEF (float:MODEF
...@@ -4743,6 +4734,15 @@ ...@@ -4743,6 +4734,15 @@
(symbol_ref "true"))) (symbol_ref "true")))
]) ])
(define_insn "*float<SWI48x:mode><MODEF:mode>2_i387"
[(set (match_operand:MODEF 0 "register_operand" "=f")
(float:MODEF (match_operand:SWI48x 1 "nonimmediate_operand" "m")))]
"TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI48x:MODE>mode)"
"fild%Z1\t%1"
[(set_attr "type" "fmov")
(set_attr "mode" "<MODEF:MODE>")
(set_attr "fp_int_src" "true")])
;; Try TARGET_USE_VECTOR_CONVERTS, but not so hard as to require extra memory ;; Try TARGET_USE_VECTOR_CONVERTS, but not so hard as to require extra memory
;; slots when !TARGET_INTER_UNIT_MOVES_TO_VEC disables the general_regs ;; slots when !TARGET_INTER_UNIT_MOVES_TO_VEC disables the general_regs
;; alternative in sse2_loadld. ;; alternative in sse2_loadld.
......
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