i386.md (HI/SImode test with imm to QImode splitters): Use gen_int_mode instead…

i386.md (HI/SImode test with imm to QImode splitters): Use gen_int_mode instead of gen_lopwart for const_int operands.

	* config/i386/i386.md (HI/SImode test with imm to QImode splitters):
	Use gen_int_mode instead of gen_lopwart for const_int operands.

From-SVN: r244058

gcc/ChangeLog

+2017-01-04  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (HI/SImode test with imm to QImode splitters):
+	Use gen_int_mode instead of gen_lopwart for const_int operands.
+
 2017-01-04  Jakub Jelinek  <jakub@redhat.com>
 
 	PR tree-optimization/71563

gcc/config/i386/i386.md

@@ -8092,7 +8092,7 @@
 			 (const_int 0)]))]
 {
   operands[2] = gen_lowpart (QImode, operands[2]);
-  operands[3] = gen_lowpart (QImode, operands[3]);
+  operands[3] = gen_int_mode (INTVAL (operands[3]), QImode);
 })
 
 ;; %%% This used to optimize known byte-wide and operations to memory,
@@ -8574,7 +8574,7 @@
 {
   operands[0] = gen_lowpart (QImode, operands[0]);
   operands[1] = gen_lowpart (QImode, operands[1]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
+  operands[2] = gen_int_mode (INTVAL (operands[2]), QImode);
 })
 
 (define_insn "*andndi3_doubleword"
@@ -8933,7 +8933,7 @@
 {
   operands[0] = gen_lowpart (QImode, operands[0]);
   operands[1] = gen_lowpart (QImode, operands[1]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
+  operands[2] = gen_int_mode (INTVAL (operands[2]), QImode);
 })
 
 (define_expand "xorqi_ext_1_cc"

gcc/config/i386/sse.md

@@ -1181,8 +1181,8 @@
 			 (match_operand:DF 3 "memory_operand")))]
   "TARGET_SSE2 && TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
    && ix86_operands_ok_for_move_multiple (operands, true, DFmode)"
-  [(set (match_dup 2) (match_dup 4))]
-  "operands[4] = adjust_address (operands[1], V2DFmode, 0);")
+  [(set (match_dup 2) (match_dup 5))]
+  "operands[5] = adjust_address (operands[1], V2DFmode, 0);")
 
 (define_peephole2
   [(set (match_operand:DF 0 "sse_reg_operand")
@@ -1193,8 +1193,8 @@
   "TARGET_SSE2 && TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
    && REGNO (operands[4]) == REGNO (operands[2])
    && ix86_operands_ok_for_move_multiple (operands, true, DFmode)"
-  [(set (match_dup 2) (match_dup 4))]
-  "operands[4] = adjust_address (operands[1], V2DFmode, 0);")
+  [(set (match_dup 2) (match_dup 5))]
+  "operands[5] = adjust_address (operands[1], V2DFmode, 0);")
 
 ;; Merge movlpd/movhpd to movupd for TARGET_SSE_UNALIGNED_STORE_OPTIMAL targets.
 (define_peephole2