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Commit 58332aa0 by Christophe Lyon Committed by Christophe Lyon
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vcls.c: New test. 

2014-11-18  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/aarch64/advsimd-intrinsics/vcls.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcnt.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcombine.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcreate.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vcvt.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vext.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vget_high.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vget_low.c: New test.

From-SVN: r217706
parent fcfce895
Showing with 1083 additions and 0 deletions
gcc/testsuite/ChangeLog
2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vcls.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcnt.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcombine.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcreate.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcvt.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vext.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vget_high.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vget_low.c: New test.
2014-11-18 Alexander Ivchenko <alexander.ivchenko@intel.com> 2014-11-18 Alexander Ivchenko <alexander.ivchenko@intel.com>
* c-c++-common/tm/safe-3.c: Add bind_pic_locally. * c-c++-common/tm/safe-3.c: Add bind_pic_locally.
......
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcls.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0x2, 0x2, 0x2, 0x2 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0x19, 0x19 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0x7, 0x7, 0x7, 0x7,
0x7, 0x7, 0x7, 0x7,
0x7, 0x7, 0x7, 0x7,
0x7, 0x7, 0x7, 0x7 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0x2, 0x2, 0x2, 0x2,
0x2, 0x2, 0x2, 0x2 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0x14, 0x14, 0x14, 0x14 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
/* Expected results with negative input. */
VECT_VAR_DECL(expected_with_negative,int,8,8) [] = { 0x7, 0x7, 0x7, 0x7,
0x7, 0x7, 0x7, 0x7 };
VECT_VAR_DECL(expected_with_negative,int,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
VECT_VAR_DECL(expected_with_negative,int,32,2) [] = { 0x1, 0x1 };
VECT_VAR_DECL(expected_with_negative,int,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected_with_negative,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected_with_negative,uint,16,4) [] = { 0x3333, 0x3333,
0x3333, 0x3333 };
VECT_VAR_DECL(expected_with_negative,uint,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected_with_negative,uint,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected_with_negative,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected_with_negative,poly,16,4) [] = { 0x3333, 0x3333,
0x3333, 0x3333 };
VECT_VAR_DECL(expected_with_negative,hfloat,32,2) [] = { 0x33333333,
0x33333333 };
VECT_VAR_DECL(expected_with_negative,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0 };
VECT_VAR_DECL(expected_with_negative,int,16,8) [] = { 0x2, 0x2, 0x2, 0x2,
0x2, 0x2, 0x2, 0x2 };
VECT_VAR_DECL(expected_with_negative,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
VECT_VAR_DECL(expected_with_negative,int,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected_with_negative,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected_with_negative,uint,16,8) [] = { 0x3333, 0x3333,
0x3333, 0x3333,
0x3333, 0x3333,
0x3333, 0x3333 };
VECT_VAR_DECL(expected_with_negative,uint,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected_with_negative,uint,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected_with_negative,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected_with_negative,poly,16,8) [] = { 0x3333, 0x3333,
0x3333, 0x3333,
0x3333, 0x3333,
0x3333, 0x3333 };
VECT_VAR_DECL(expected_with_negative,hfloat,32,4) [] = { 0x33333333,
0x33333333,
0x33333333,
0x33333333 };
#define INSN_NAME vcls
#define TEST_MSG "VCLS/VCLSQ"
#define FNNAME1(NAME) void exec_ ## NAME (void)
#define FNNAME(NAME) FNNAME1(NAME)
FNNAME (INSN_NAME)
{
/* Basic test: y=vcls(x), then store the result. */
#define TEST_UNARY_OP1(INSN, Q, T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = \
INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
#define TEST_UNARY_OP(INSN, Q, T1, T2, W, N) \
TEST_UNARY_OP1(INSN, Q, T1, T2, W, N) \
/* No need for 64 bits variants. */
DECL_VARIABLE(vector, int, 8, 8);
DECL_VARIABLE(vector, int, 16, 4);
DECL_VARIABLE(vector, int, 32, 2);
DECL_VARIABLE(vector, int, 8, 16);
DECL_VARIABLE(vector, int, 16, 8);
DECL_VARIABLE(vector, int, 32, 4);
DECL_VARIABLE(vector_res, int, 8, 8);
DECL_VARIABLE(vector_res, int, 16, 4);
DECL_VARIABLE(vector_res, int, 32, 2);
DECL_VARIABLE(vector_res, int, 8, 16);
DECL_VARIABLE(vector_res, int, 16, 8);
DECL_VARIABLE(vector_res, int, 32, 4);
clean_results ();
/* Fill input vector with arbitrary values. */
VDUP(vector, , int, s, 8, 8, 0x1);
VDUP(vector, , int, s, 16, 4, 0x1234);
VDUP(vector, , int, s, 32, 2, 0x34);
VDUP(vector, q, int, s, 8, 16, 0);
VDUP(vector, q, int, s, 16, 8, 0x1234);
VDUP(vector, q, int, s, 32, 4, 0x678);
/* Apply a unary operator named INSN_NAME. */
TEST_UNARY_OP(INSN_NAME, , int, s, 8, 8);
TEST_UNARY_OP(INSN_NAME, , int, s, 16, 4);
TEST_UNARY_OP(INSN_NAME, , int, s, 32, 2);
TEST_UNARY_OP(INSN_NAME, q, int, s, 8, 16);
TEST_UNARY_OP(INSN_NAME, q, int, s, 16, 8);
TEST_UNARY_OP(INSN_NAME, q, int, s, 32, 4);
CHECK_RESULTS (TEST_MSG, " (positive input)");
/* Fill input vector with arbitrary values (negative). */
VDUP(vector, , int, s, 8, 8, 0xFF);
VDUP(vector, , int, s, 16, 4, 0xC234);
VDUP(vector, , int, s, 32, 2, 0xDEAD0034);
VDUP(vector, q, int, s, 8, 16, 0x80);
VDUP(vector, q, int, s, 16, 8, 0xE234);
VDUP(vector, q, int, s, 32, 4, 0xBEEF0678);
/* Apply a unary operator named INSN_NAME */
TEST_UNARY_OP(INSN_NAME, , int, s, 8, 8);
TEST_UNARY_OP(INSN_NAME, , int, s, 16, 4);
TEST_UNARY_OP(INSN_NAME, , int, s, 32, 2);
TEST_UNARY_OP(INSN_NAME, q, int, s, 8, 16);
TEST_UNARY_OP(INSN_NAME, q, int, s, 16, 8);
TEST_UNARY_OP(INSN_NAME, q, int, s, 32, 4);
CHECK_RESULTS_NAMED (TEST_MSG, expected_with_negative, " (negative input)");
}
int main (void)
{
exec_vcls ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcnt.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0x8, 0x8, 0x8, 0x8, 0x8, 0x8, 0x8, 0x8 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4 };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333, 0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6,
0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6,
0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
#define INSN_NAME vcnt
#define TEST_MSG "VCNT/VCNTQ"
#define FNNAME1(NAME) void exec_ ## NAME (void)
#define FNNAME(NAME) FNNAME1(NAME)
FNNAME (INSN_NAME)
{
/* Basic test: y=vcnt(x), then store the result. */
#define TEST_UNARY_OP1(INSN, Q, T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = \
INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
#define TEST_UNARY_OP(INSN, Q, T1, T2, W, N) \
TEST_UNARY_OP1(INSN, Q, T1, T2, W, N) \
/* No need for 64 bits variants. */
DECL_VARIABLE(vector, int, 8, 8);
DECL_VARIABLE(vector, uint, 8, 8);
DECL_VARIABLE(vector, poly, 8, 8);
DECL_VARIABLE(vector, int, 8, 16);
DECL_VARIABLE(vector, uint, 8, 16);
DECL_VARIABLE(vector, poly, 8, 16);
DECL_VARIABLE(vector_res, int, 8, 8);
DECL_VARIABLE(vector_res, uint, 8, 8);
DECL_VARIABLE(vector_res, poly, 8, 8);
DECL_VARIABLE(vector_res, int, 8, 16);
DECL_VARIABLE(vector_res, uint, 8, 16);
DECL_VARIABLE(vector_res, poly, 8, 16);
clean_results ();
/* Fill input vector with arbitrary values. */
VDUP(vector, , int, s, 8, 8, 0xFF);
VDUP(vector, , uint, u, 8, 8, 0x35);
VDUP(vector, , poly, p, 8, 8, 0x35);
VDUP(vector, q, int, s, 8, 16, 0);
VDUP(vector, q, uint, u, 8, 16, 0xBD);
VDUP(vector, q, poly, p, 8, 16, 0xBD);
/* Apply a unary operator named INSN_NAME. */
TEST_UNARY_OP(INSN_NAME, , int, s, 8, 8);
TEST_UNARY_OP(INSN_NAME, , uint, u, 8, 8);
TEST_UNARY_OP(INSN_NAME, , poly, p, 8, 8);
TEST_UNARY_OP(INSN_NAME, q, int, s, 8, 16);
TEST_UNARY_OP(INSN_NAME, q, uint, u, 8, 16);
TEST_UNARY_OP(INSN_NAME, q, poly, p, 8, 16);
CHECK_RESULTS (TEST_MSG, "");
}
int main (void)
{
exec_vcnt ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcombine.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
0xf4, 0xf5, 0xf6, 0xf7,
0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
0x22, 0x22, 0x22, 0x22 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff0, 0xfffffff1, 0x33, 0x33 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0, 0x44 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
0xf4, 0xf5, 0xf6, 0xf7,
0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
0x66, 0x66, 0x66, 0x66 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff1, 0x77, 0x77 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0, 0x88 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
0xf4, 0xf5, 0xf6, 0xf7,
0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
0x66, 0x66, 0x66, 0x66 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
0x40533333, 0x40533333 };
#define TEST_MSG "VCOMBINE"
void exec_vcombine (void)
{
/* Basic test: vec128=vcombine(vec64_a, vec64_b), then store the result. */
#define TEST_VCOMBINE(T1, T2, W, N, N2) \
VECT_VAR(vector128, T1, W, N2) = \
vcombine_##T2##W(VECT_VAR(vector64_a, T1, W, N), \
VECT_VAR(vector64_b, T1, W, N)); \
vst1q_##T2##W(VECT_VAR(result, T1, W, N2), VECT_VAR(vector128, T1, W, N2))
DECL_VARIABLE_64BITS_VARIANTS(vector64_a);
DECL_VARIABLE_64BITS_VARIANTS(vector64_b);
DECL_VARIABLE_128BITS_VARIANTS(vector128);
/* Initialize input "vector64_a" from "buffer". */
TEST_MACRO_64BITS_VARIANTS_2_5(VLOAD, vector64_a, buffer);
VLOAD(vector64_a, buffer, , float, f, 32, 2);
/* Choose init value arbitrarily. */
VDUP(vector64_b, , int, s, 8, 8, 0x11);
VDUP(vector64_b, , int, s, 16, 4, 0x22);
VDUP(vector64_b, , int, s, 32, 2, 0x33);
VDUP(vector64_b, , int, s, 64, 1, 0x44);
VDUP(vector64_b, , uint, u, 8, 8, 0x55);
VDUP(vector64_b, , uint, u, 16, 4, 0x66);
VDUP(vector64_b, , uint, u, 32, 2, 0x77);
VDUP(vector64_b, , uint, u, 64, 1, 0x88);
VDUP(vector64_b, , poly, p, 8, 8, 0x55);
VDUP(vector64_b, , poly, p, 16, 4, 0x66);
VDUP(vector64_b, , float, f, 32, 2, 3.3f);
clean_results ();
/* Execute the tests. */
TEST_VCOMBINE(int, s, 8, 8, 16);
TEST_VCOMBINE(int, s, 16, 4, 8);
TEST_VCOMBINE(int, s, 32, 2, 4);
TEST_VCOMBINE(int, s, 64, 1, 2);
TEST_VCOMBINE(uint, u, 8, 8, 16);
TEST_VCOMBINE(uint, u, 16, 4, 8);
TEST_VCOMBINE(uint, u, 32, 2, 4);
TEST_VCOMBINE(uint, u, 64, 1, 2);
TEST_VCOMBINE(poly, p, 8, 8, 16);
TEST_VCOMBINE(poly, p, 16, 4, 8);
TEST_VCOMBINE(float, f, 32, 2, 4);
CHECK_RESULTS (TEST_MSG, "");
}
int main (void)
{
exec_vcombine ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcreate.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0xf0, 0xde, 0xbc, 0x9a,
0x78, 0x56, 0x34, 0x12 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0xdef0, 0x9abc, 0x5678, 0x1234 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0x9abcdef0, 0x12345678 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0x123456789abcdef0 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf0, 0xde, 0xbc, 0x9a,
0x78, 0x56, 0x34, 0x12 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0xdef0, 0x9abc, 0x5678, 0x1234 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0x9abcdef0, 0x12345678 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0x123456789abcdef0 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf0, 0xde, 0xbc, 0x9a,
0x78, 0x56, 0x34, 0x12 };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0xdef0, 0x9abc, 0x5678, 0x1234 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x9abcdef0, 0x12345678 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
#define INSN_NAME vcreate
#define TEST_MSG "VCREATE"
#define FNNAME1(NAME) void exec_ ## NAME (void)
#define FNNAME(NAME) FNNAME1(NAME)
FNNAME (INSN_NAME)
{
/* Basic test: y=vcreate(x), then store the result. */
#define TEST_VCREATE(T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = vcreate_##T2##W(VECT_VAR(val, T1, W, N)); \
vst1_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
#define DECL_VAL(VAR, T1, W, N) \
uint64_t VECT_VAR(VAR, T1, W, N)
DECL_VAL(val, int, 8, 8);
DECL_VAL(val, int, 16, 4);
DECL_VAL(val, int, 32, 2);
DECL_VAL(val, int, 64, 1);
DECL_VAL(val, float, 32, 2);
DECL_VAL(val, uint, 8, 8);
DECL_VAL(val, uint, 16, 4);
DECL_VAL(val, uint, 32, 2);
DECL_VAL(val, uint, 64, 1);
DECL_VAL(val, poly, 8, 8);
DECL_VAL(val, poly, 16, 4);
DECL_VARIABLE(vector_res, int, 8, 8);
DECL_VARIABLE(vector_res, int, 16, 4);
DECL_VARIABLE(vector_res, int, 32, 2);
DECL_VARIABLE(vector_res, int, 64, 1);
DECL_VARIABLE(vector_res, float, 32, 2);
DECL_VARIABLE(vector_res, uint, 8, 8);
DECL_VARIABLE(vector_res, uint, 16, 4);
DECL_VARIABLE(vector_res, uint, 32, 2);
DECL_VARIABLE(vector_res, uint, 64, 1);
DECL_VARIABLE(vector_res, poly, 8, 8);
DECL_VARIABLE(vector_res, poly, 16, 4);
clean_results ();
/* Initialize input values arbitrarily. */
VECT_VAR(val, int, 8, 8) = 0x123456789abcdef0LL;
VECT_VAR(val, int, 16, 4) = 0x123456789abcdef0LL;
VECT_VAR(val, int, 32, 2) = 0x123456789abcdef0LL;
VECT_VAR(val, int, 64, 1) = 0x123456789abcdef0LL;
VECT_VAR(val, float, 32, 2) = 0x123456789abcdef0LL;
VECT_VAR(val, uint, 8, 8) = 0x123456789abcdef0ULL;
VECT_VAR(val, uint, 16, 4) = 0x123456789abcdef0ULL;
VECT_VAR(val, uint, 32, 2) = 0x123456789abcdef0ULL;
VECT_VAR(val, uint, 64, 1) = 0x123456789abcdef0ULL;
VECT_VAR(val, poly, 8, 8) = 0x123456789abcdef0ULL;
VECT_VAR(val, poly, 16, 4) = 0x123456789abcdef0ULL;
TEST_VCREATE(int, s, 8, 8);
TEST_VCREATE(int, s, 16, 4);
TEST_VCREATE(int, s, 32, 2);
TEST_VCREATE(float, f, 32, 2);
TEST_VCREATE(int, s, 64, 1);
TEST_VCREATE(uint, u, 8, 8);
TEST_VCREATE(uint, u, 16, 4);
TEST_VCREATE(uint, u, 32, 2);
TEST_VCREATE(uint, u, 64, 1);
TEST_VCREATE(poly, p, 8, 8);
TEST_VCREATE(poly, p, 16, 4);
CHECK_RESULTS (TEST_MSG, "");
}
int main (void)
{
exec_vcreate ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvt.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#include <math.h>
/* Expected results for vcvt. */
VECT_VAR_DECL(expected_s,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
VECT_VAR_DECL(expected_u,hfloat,32,2) [] = { 0x4f800000, 0x4f800000 };
VECT_VAR_DECL(expected_s,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
0xc1600000, 0xc1500000 };
VECT_VAR_DECL(expected_u,hfloat,32,4) [] = { 0x4f800000, 0x4f800000,
0x4f800000, 0x4f800000 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff1, 0x5 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0x0, 0x5 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0x0, 0x0, 0xf, 0xfffffff1 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0xf, 0x0 };
/* Expected results for vcvt_n. */
VECT_VAR_DECL(expected_vcvt_n_s,hfloat,32,2) [] = { 0xc0800000, 0xc0700000 };
VECT_VAR_DECL(expected_vcvt_n_u,hfloat,32,2) [] = { 0x4c000000, 0x4c000000 };
VECT_VAR_DECL(expected_vcvt_n_s,hfloat,32,4) [] = { 0xb2800000, 0xb2700000,
0xb2600000, 0xb2500000 };
VECT_VAR_DECL(expected_vcvt_n_u,hfloat,32,4) [] = { 0x49800000, 0x49800000,
0x49800000, 0x49800000 };
VECT_VAR_DECL(expected_vcvt_n,int,32,2) [] = { 0xff0b3333, 0x54cccd };
VECT_VAR_DECL(expected_vcvt_n,uint,32,2) [] = { 0x0, 0x15 };
VECT_VAR_DECL(expected_vcvt_n,int,32,4) [] = { 0x0, 0x0, 0x1e3d7, 0xfffe1c29 };
VECT_VAR_DECL(expected_vcvt_n,uint,32,4) [] = { 0x0, 0x0, 0x1e, 0x0 };
/* Expected results for vcvt with rounding. */
VECT_VAR_DECL(expected_rounding,int,32,2) [] = { 0xa, 0xa };
VECT_VAR_DECL(expected_rounding,uint,32,2) [] = { 0xa, 0xa };
VECT_VAR_DECL(expected_rounding,int,32,4) [] = { 0x7d, 0x7d, 0x7d, 0x7d };
VECT_VAR_DECL(expected_rounding,uint,32,4) [] = { 0x7d, 0x7d, 0x7d, 0x7d };
/* Expected results for vcvt_n with rounding. */
VECT_VAR_DECL(expected_vcvt_n_rounding,int,32,2) [] = { 0xa66666, 0xa66666 };
VECT_VAR_DECL(expected_vcvt_n_rounding,uint,32,2) [] = { 0xa66666, 0xa66666 };
VECT_VAR_DECL(expected_vcvt_n_rounding,int,32,4) [] = { 0xfbccc, 0xfbccc,
0xfbccc, 0xfbccc };
VECT_VAR_DECL(expected_vcvt_n_rounding,uint,32,4) [] = { 0xfbccc, 0xfbccc,
0xfbccc, 0xfbccc };
/* Expected results for vcvt_n with saturation. */
VECT_VAR_DECL(expected_vcvt_n_saturation,int,32,2) [] = { 0x7fffffff,
0x7fffffff };
VECT_VAR_DECL(expected_vcvt_n_saturation,int,32,4) [] = { 0x7fffffff,
0x7fffffff,
0x7fffffff, 0x7fffffff };
#define TEST_MSG "VCVT/VCVTQ"
void exec_vcvt (void)
{
int i;
/* Basic test: y=vcvt(x), then store the result. */
#define TEST_VCVT(Q, T1, T2, W, N, TS1, TS2, EXP) \
VECT_VAR(vector_res, T1, W, N) = \
vcvt##Q##_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vector_res, T1, W, N)); \
CHECK(TEST_MSG, T1, W, N, PRIx##W, EXP, TEST_MSG2);
#define TEST_VCVT_FP(Q, T1, T2, W, N, TS1, TS2, EXP) \
VECT_VAR(vector_res, T1, W, N) = \
vcvt##Q##_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vector_res, T1, W, N)); \
CHECK_FP(TEST_MSG, T1, W, N, PRIx##W, EXP, TEST_MSG2);
#define TEST_VCVT_N(Q, T1, T2, W, N, TS1, TS2, V, EXP) \
VECT_VAR(vector_res, T1, W, N) = \
vcvt##Q##_n_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N), V); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vector_res, T1, W, N)); \
CHECK(TEST_MSG, T1, W, N, PRIx##W, EXP, TEST_MSG2);
#define TEST_VCVT_N_FP(Q, T1, T2, W, N, TS1, TS2, V, EXP) \
VECT_VAR(vector_res, T1, W, N) = \
vcvt##Q##_n_##T2##W##_##TS2##W(VECT_VAR(vector, TS1, W, N), V); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
VECT_VAR(vector_res, T1, W, N)); \
CHECK_FP(TEST_MSG, T1, W, N, PRIx##W, EXP, TEST_MSG2);
DECL_VARIABLE_ALL_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
/* Initialize input "vector" from "buffer". */
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
VLOAD(vector, buffer, , float, f, 32, 2);
VLOAD(vector, buffer, q, float, f, 32, 4);
/* Make sure some elements have a fractional part, to exercise
integer conversions. */
VSET_LANE(vector, , float, f, 32, 2, 0, -15.3f);
VSET_LANE(vector, , float, f, 32, 2, 1, 5.3f);
VSET_LANE(vector, q, float, f, 32, 4, 2, -15.3f);
VSET_LANE(vector, q, float, f, 32, 4, 3, 5.3f);
/* The same result buffers are used multiple times, so we check them
before overwriting them. */
#define TEST_MSG2 ""
/* vcvt_f32_xx. */
TEST_VCVT_FP(, float, f, 32, 2, int, s, expected_s);
TEST_VCVT_FP(, float, f, 32, 2, uint, u, expected_u);
/* vcvtq_f32_xx. */
TEST_VCVT_FP(q, float, f, 32, 4, int, s, expected_s);
TEST_VCVT_FP(q, float, f, 32, 4, uint, u, expected_u);
/* vcvt_xx_f32. */
TEST_VCVT(, int, s, 32, 2, float, f, expected);
TEST_VCVT(, uint, u, 32, 2, float, f, expected);
VSET_LANE(vector, q, float, f, 32, 4, 0, 0.0f);
VSET_LANE(vector, q, float, f, 32, 4, 1, -0.0f);
VSET_LANE(vector, q, float, f, 32, 4, 2, 15.12f);
VSET_LANE(vector, q, float, f, 32, 4, 3, -15.12f);
/* vcvtq_xx_f32. */
TEST_VCVT(q, int, s, 32, 4, float, f, expected);
TEST_VCVT(q, uint, u, 32, 4, float, f, expected);
/* The same result buffers are used multiple times, so we check them
before overwriting them. */
#undef TEST_MSG
#define TEST_MSG "VCVT_N/VCVTQ_N"
/* vcvt_n_f32_xx. */
TEST_VCVT_N_FP(, float, f, 32, 2, int, s, 2, expected_vcvt_n_s);
TEST_VCVT_N_FP(, float, f, 32, 2, uint, u, 7, expected_vcvt_n_u);
/* vcvtq_n_f32_xx. */
TEST_VCVT_N_FP(q, float, f, 32, 4, int, s, 30, expected_vcvt_n_s);
TEST_VCVT_N_FP(q, float, f, 32, 4, uint, u, 12, expected_vcvt_n_u);
/* vcvt_n_xx_f32. */
TEST_VCVT_N(, int, s, 32, 2, float, f, 20, expected_vcvt_n);
TEST_VCVT_N(, uint, u, 32, 2, float, f, 2, expected_vcvt_n);
/* vcvtq_n_xx_f32. */
TEST_VCVT_N(q, int, s, 32, 4, float, f, 13, expected_vcvt_n);
TEST_VCVT_N(q, uint, u, 32, 4, float, f, 1, expected_vcvt_n);
/* Check rounding. */
#undef TEST_MSG
#define TEST_MSG "VCVT/VCVTQ"
#undef TEST_MSG2
#define TEST_MSG2 "(check rounding)"
VDUP(vector, , float, f, 32, 2, 10.4f);
VDUP(vector, q, float, f, 32, 4, 125.9f);
/* vcvt_xx_f32. */
TEST_VCVT(, int, s, 32, 2, float, f, expected_rounding);
TEST_VCVT(, uint, u, 32, 2, float, f, expected_rounding);
/* vcvtq_xx_f32. */
TEST_VCVT(q, int, s, 32, 4, float, f, expected_rounding);
TEST_VCVT(q, uint, u, 32, 4, float, f, expected_rounding);
#undef TEST_MSG
#define TEST_MSG "VCVT_N/VCVTQ_N"
/* vcvt_n_xx_f32. */
TEST_VCVT_N(, int, s, 32, 2, float, f, 20, expected_vcvt_n_rounding);
TEST_VCVT_N(, uint, u, 32, 2, float, f, 20, expected_vcvt_n_rounding);
/* vcvtq_n_xx_f32. */
TEST_VCVT_N(q, int, s, 32, 4, float, f, 13, expected_vcvt_n_rounding);
TEST_VCVT_N(q, uint, u, 32, 4, float, f, 13, expected_vcvt_n_rounding);
#undef TEST_MSG
#define TEST_MSG "VCVT_N/VCVTQ_N"
#undef TEST_MSG2
#define TEST_MSG2 "(check saturation)"
/* vcvt_n_xx_f32. */
TEST_VCVT_N(, int, s, 32, 2, float, f, 31, expected_vcvt_n_saturation);
/* vcvtq_n_xx_f32. */
TEST_VCVT_N(q, int, s, 32, 4, float, f, 31, expected_vcvt_n_saturation);
}
int main (void)
{
exec_vcvt ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0xf1, 0xf1, 0xf1, 0xf1,
0xf1, 0xf1, 0xf1, 0xf1 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff2, 0xfff2, 0xfff2, 0xfff2 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff1, 0xfffffff1 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf7, 0xf7, 0xf7, 0xf7,
0xf7, 0xf7, 0xf7, 0xf7 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff1, 0xfffffff1 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf7, 0xf7, 0xf7, 0xf7,
0xf7, 0xf7, 0xf7, 0xf7 };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1700000, 0xc1700000 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0xf2, 0xf2, 0xf2, 0xf2,
0xf2, 0xf2, 0xf2, 0xf2,
0xf2, 0xf2, 0xf2, 0xf2,
0xf2, 0xf2, 0xf2, 0xf2 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff3, 0xfff3, 0xfff3, 0xfff3,
0xfff3, 0xfff3, 0xfff3, 0xfff3 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff1, 0xfffffff1,
0xfffffff1, 0xfffffff1 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0,
0xfffffffffffffff0 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1,
0xfff1, 0xfff1, 0xfff1, 0xfff1 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff0,
0xfffffff0, 0xfffffff0 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
0xfffffffffffffff0 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1,
0xfff1, 0xfff1, 0xfff1, 0xfff1 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1700000, 0xc1700000,
0xc1700000, 0xc1700000 };
#define TEST_MSG "VDUP_LANE/VDUP_LANEQ"
void exec_vdup_lane (void)
{
/* Basic test: vec1=vdup_lane(vec2, lane), then store the result. */
#define TEST_VDUP_LANE(Q, T1, T2, W, N, N2, L) \
VECT_VAR(vector_res, T1, W, N) = \
vdup##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N2), L); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
/* Input vector can only have 64 bits. */
DECL_VARIABLE_64BITS_VARIANTS(vector);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
TEST_MACRO_64BITS_VARIANTS_2_5(VLOAD, vector, buffer);
VLOAD(vector, buffer, , float, f, 32, 2);
/* Choose lane arbitrarily. */
TEST_VDUP_LANE(, int, s, 8, 8, 8, 1);
TEST_VDUP_LANE(, int, s, 16, 4, 4, 2);
TEST_VDUP_LANE(, int, s, 32, 2, 2, 1);
TEST_VDUP_LANE(, int, s, 64, 1, 1, 0);
TEST_VDUP_LANE(, uint, u, 8, 8, 8, 7);
TEST_VDUP_LANE(, uint, u, 16, 4, 4, 3);
TEST_VDUP_LANE(, uint, u, 32, 2, 2, 1);
TEST_VDUP_LANE(, uint, u, 64, 1, 1, 0);
TEST_VDUP_LANE(, poly, p, 8, 8, 8, 7);
TEST_VDUP_LANE(, poly, p, 16, 4, 4, 3);
TEST_VDUP_LANE(, float, f, 32, 2, 2, 1);
TEST_VDUP_LANE(q, int, s, 8, 16, 8, 2);
TEST_VDUP_LANE(q, int, s, 16, 8, 4, 3);
TEST_VDUP_LANE(q, int, s, 32, 4, 2, 1);
TEST_VDUP_LANE(q, int, s, 64, 2, 1, 0);
TEST_VDUP_LANE(q, uint, u, 8, 16, 8, 5);
TEST_VDUP_LANE(q, uint, u, 16, 8, 4, 1);
TEST_VDUP_LANE(q, uint, u, 32, 4, 2, 0);
TEST_VDUP_LANE(q, uint, u, 64, 2, 1, 0);
TEST_VDUP_LANE(q, poly, p, 8, 16, 8, 5);
TEST_VDUP_LANE(q, poly, p, 16, 8, 4, 1);
TEST_VDUP_LANE(q, float, f, 32, 4, 2, 1);
CHECK_RESULTS (TEST_MSG, "");
}
int main (void)
{
exec_vdup_lane ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vext.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0xf7, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff3, 0x22, 0x22, 0x22 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff1, 0x33 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf6, 0xf7, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff2, 0xfff3, 0x66, 0x66 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff1, 0x77 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf6, 0xf7, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55 };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff2, 0xfff3, 0x66, 0x66 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1700000, 0x42066666 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0xfe, 0xff, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff7, 0x22, 0x22, 0x22,
0x22, 0x22, 0x22, 0x22 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff3, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff1, 0x44 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0xfc, 0xfd, 0xfe, 0xff,
0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff6, 0xfff7, 0x66, 0x66,
0x66, 0x66, 0x66, 0x66 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff3, 0x77, 0x77, 0x77 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff1, 0x88 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0xfc, 0xfd, 0xfe, 0xff,
0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff6, 0xfff7, 0x66, 0x66,
0x66, 0x66, 0x66, 0x66 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1500000, 0x4204cccd,
0x4204cccd, 0x4204cccd };
#define TEST_MSG "VEXT/VEXTQ"
void exec_vext (void)
{
/* vector_res = vext(vector1,vector2,offset), then store the result. */
#define TEST_VEXT(Q, T1, T2, W, N, V) \
VECT_VAR(vector_res, T1, W, N) = \
vext##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
VECT_VAR(vector2, T1, W, N), \
V); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
DECL_VARIABLE_ALL_VARIANTS(vector1);
DECL_VARIABLE_ALL_VARIANTS(vector2);
DECL_VARIABLE_ALL_VARIANTS(vector_res);
clean_results ();
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector1, buffer);
VLOAD(vector1, buffer, , float, f, 32, 2);
VLOAD(vector1, buffer, q, float, f, 32, 4);
/* Choose arbitrary initialization values. */
VDUP(vector2, , int, s, 8, 8, 0x11);
VDUP(vector2, , int, s, 16, 4, 0x22);
VDUP(vector2, , int, s, 32, 2, 0x33);
VDUP(vector2, , int, s, 64, 1, 0x44);
VDUP(vector2, , uint, u, 8, 8, 0x55);
VDUP(vector2, , uint, u, 16, 4, 0x66);
VDUP(vector2, , uint, u, 32, 2, 0x77);
VDUP(vector2, , uint, u, 64, 1, 0x88);
VDUP(vector2, , poly, p, 8, 8, 0x55);
VDUP(vector2, , poly, p, 16, 4, 0x66);
VDUP(vector2, , float, f, 32, 2, 33.6f);
VDUP(vector2, q, int, s, 8, 16, 0x11);
VDUP(vector2, q, int, s, 16, 8, 0x22);
VDUP(vector2, q, int, s, 32, 4, 0x33);
VDUP(vector2, q, int, s, 64, 2, 0x44);
VDUP(vector2, q, uint, u, 8, 16, 0x55);
VDUP(vector2, q, uint, u, 16, 8, 0x66);
VDUP(vector2, q, uint, u, 32, 4, 0x77);
VDUP(vector2, q, uint, u, 64, 2, 0x88);
VDUP(vector2, q, poly, p, 8, 16, 0x55);
VDUP(vector2, q, poly, p, 16, 8, 0x66);
VDUP(vector2, q, float, f, 32, 4, 33.2f);
/* Choose arbitrary extract offsets. */
TEST_VEXT(, int, s, 8, 8, 7);
TEST_VEXT(, int, s, 16, 4, 3);
TEST_VEXT(, int, s, 32, 2, 1);
TEST_VEXT(, int, s, 64, 1, 0);
TEST_VEXT(, uint, u, 8, 8, 6);
TEST_VEXT(, uint, u, 16, 4, 2);
TEST_VEXT(, uint, u, 32, 2, 1);
TEST_VEXT(, uint, u, 64, 1, 0);
TEST_VEXT(, poly, p, 8, 8, 6);
TEST_VEXT(, poly, p, 16, 4, 2);
TEST_VEXT(, float, f, 32, 2, 1);
TEST_VEXT(q, int, s, 8, 16, 14);
TEST_VEXT(q, int, s, 16, 8, 7);
TEST_VEXT(q, int, s, 32, 4, 3);
TEST_VEXT(q, int, s, 64, 2, 1);
TEST_VEXT(q, uint, u, 8, 16, 12);
TEST_VEXT(q, uint, u, 16, 8, 6);
TEST_VEXT(q, uint, u, 32, 4, 3);
TEST_VEXT(q, uint, u, 64, 2, 1);
TEST_VEXT(q, poly, p, 8, 16, 12);
TEST_VEXT(q, poly, p, 16, 8, 6);
TEST_VEXT(q, float, f, 32, 4, 3);
CHECK_RESULTS (TEST_MSG, "");
}
int main (void)
{
exec_vext ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_high.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
0xfc, 0xfd, 0xfe, 0xff };
VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff2, 0xfffffff3 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff1 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
0xfc, 0xfd, 0xfe, 0xff };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff2, 0xfffffff3 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff1 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
0xfc, 0xfd, 0xfe, 0xff };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
#define TEST_MSG "VGET_HIGH"
void exec_vget_high (void)
{
/* Basic test: vec64=vget_high(vec128), then store the result. */
#define TEST_VGET_HIGH(T1, T2, W, N, N2) \
VECT_VAR(vector64, T1, W, N) = \
vget_high_##T2##W(VECT_VAR(vector128, T1, W, N2)); \
vst1_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector64, T1, W, N))
DECL_VARIABLE_64BITS_VARIANTS(vector64);
DECL_VARIABLE_128BITS_VARIANTS(vector128);
TEST_MACRO_128BITS_VARIANTS_2_5(VLOAD, vector128, buffer);
VLOAD(vector128, buffer, q, float, f, 32, 4);
clean_results ();
/* Execute the tests. */
TEST_VGET_HIGH(int, s, 8, 8, 16);
TEST_VGET_HIGH(int, s, 16, 4, 8);
TEST_VGET_HIGH(int, s, 32, 2, 4);
TEST_VGET_HIGH(int, s, 64, 1, 2);
TEST_VGET_HIGH(uint, u, 8, 8, 16);
TEST_VGET_HIGH(uint, u, 16, 4, 8);
TEST_VGET_HIGH(uint, u, 32, 2, 4);
TEST_VGET_HIGH(uint, u, 64, 1, 2);
TEST_VGET_HIGH(poly, p, 8, 8, 16);
TEST_VGET_HIGH(poly, p, 16, 4, 8);
TEST_VGET_HIGH(float, f, 32, 2, 4);
CHECK_RESULTS (TEST_MSG, "");
}
int main (void)
{
exec_vget_high ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_low.c 0 → 100644
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
/* Expected results. */
VECT_VAR_DECL(expected,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
0xf4, 0xf5, 0xf6, 0xf7 };
VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
0xf4, 0xf5, 0xf6, 0xf7 };
VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
0xf4, 0xf5, 0xf6, 0xf7 };
VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
0x3333333333333333 };
VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
0x3333, 0x3333, 0x3333, 0x3333 };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
0x33333333, 0x33333333 };
#define TEST_MSG "VGET_LOW"
void exec_vget_low (void)
{
/* Basic test: vec64=vget_low(vec128), then store the result. */
#define TEST_VGET_LOW(T1, T2, W, N, N2) \
VECT_VAR(vector64, T1, W, N) = \
vget_low_##T2##W(VECT_VAR(vector128, T1, W, N2)); \
vst1_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector64, T1, W, N))
DECL_VARIABLE_64BITS_VARIANTS(vector64);
DECL_VARIABLE_128BITS_VARIANTS(vector128);
TEST_MACRO_128BITS_VARIANTS_2_5(VLOAD, vector128, buffer);
VLOAD(vector128, buffer, q, float, f, 32, 4);
clean_results ();
/* Execute the tests. */
TEST_VGET_LOW(int, s, 8, 8, 16);
TEST_VGET_LOW(int, s, 16, 4, 8);
TEST_VGET_LOW(int, s, 32, 2, 4);
TEST_VGET_LOW(int, s, 64, 1, 2);
TEST_VGET_LOW(uint, u, 8, 8, 16);
TEST_VGET_LOW(uint, u, 16, 4, 8);
TEST_VGET_LOW(uint, u, 32, 2, 4);
TEST_VGET_LOW(uint, u, 64, 1, 2);
TEST_VGET_LOW(poly, p, 8, 8, 16);
TEST_VGET_LOW(poly, p, 16, 4, 8);
TEST_VGET_LOW(float, f, 32, 2, 4);
CHECK_RESULTS (TEST_MSG, "");
}
int main (void)
{
exec_vget_low ();
return 0;
}
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