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Commit 57e6b981 by Michael Meissner Committed by Michael Meissner
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vsx.md (vsx_xscvdpspn): Eliminate useless alternative constraint. 

2017-09-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_xscvdpspn): Eliminate useless
	alternative constraint.
	(vsx_xscvspdpn): Likewise.
	(vsx_xscvspdpn_scalar): Likewise.

From-SVN: r253213
parent 2f448503
Showing with 12 additions and 7 deletions
gcc/ChangeLog
...@@ -16,6 +16,11 @@ ...@@ -16,6 +16,11 @@
instruction instead of FRSP and XSCVDPSPN. instruction instead of FRSP and XSCVDPSPN.
* config/rs6000/vsx.md (vsx_xscvspdp_scalar2): Move insn so that * config/rs6000/vsx.md (vsx_xscvspdp_scalar2): Move insn so that
it is adjacent to the other XSCVSPDP insns. it is adjacent to the other XSCVSPDP insns.
(vsx_xscvdpsp_scalar): Use "ww" constraint instead of "f" to allow
SFmode to be in traditional Altivec registers.
(vsx_xscvdpspn): Eliminate useless alternative constraint.
(vsx_xscvspdpn): Likewise.
(vsx_xscvspdpn_scalar): Likewise.
2017-09-26 Martin Jambor <mjambor@suse.cz> 2017-09-26 Martin Jambor <mjambor@suse.cz>
gcc/config/rs6000/vsx.md
...@@ -1803,7 +1803,7 @@ ...@@ -1803,7 +1803,7 @@
;; format of scalars is actually DF. ;; format of scalars is actually DF.
(define_insn "vsx_xscvdpsp_scalar" (define_insn "vsx_xscvdpsp_scalar"
[(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa")
(unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "f")] (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "ww")]
UNSPEC_VSX_CVSPDP))] UNSPEC_VSX_CVSPDP))]
"VECTOR_UNIT_VSX_P (V4SFmode)" "VECTOR_UNIT_VSX_P (V4SFmode)"
"xscvdpsp %x0,%x1" "xscvdpsp %x0,%x1"
...@@ -1811,24 +1811,24 @@ ...@@ -1811,24 +1811,24 @@
;; ISA 2.07 xscvdpspn/xscvspdpn that does not raise an error on signalling NaNs ;; ISA 2.07 xscvdpspn/xscvspdpn that does not raise an error on signalling NaNs
(define_insn "vsx_xscvdpspn" (define_insn "vsx_xscvdpspn"
[(set (match_operand:V4SF 0 "vsx_register_operand" "=ww,?ww") [(set (match_operand:V4SF 0 "vsx_register_operand" "=ww")
(unspec:V4SF [(match_operand:DF 1 "vsx_register_operand" "wd,wa")] (unspec:V4SF [(match_operand:DF 1 "vsx_register_operand" "ws")]
UNSPEC_VSX_CVDPSPN))] UNSPEC_VSX_CVDPSPN))]
"TARGET_XSCVDPSPN" "TARGET_XSCVDPSPN"
"xscvdpspn %x0,%x1" "xscvdpspn %x0,%x1"
[(set_attr "type" "fp")]) [(set_attr "type" "fp")])
(define_insn "vsx_xscvspdpn" (define_insn "vsx_xscvspdpn"
[(set (match_operand:DF 0 "vsx_register_operand" "=ws,?ws") [(set (match_operand:DF 0 "vsx_register_operand" "=ws")
(unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wf,wa")] (unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wa")]
UNSPEC_VSX_CVSPDPN))] UNSPEC_VSX_CVSPDPN))]
"TARGET_XSCVSPDPN" "TARGET_XSCVSPDPN"
"xscvspdpn %x0,%x1" "xscvspdpn %x0,%x1"
[(set_attr "type" "fp")]) [(set_attr "type" "fp")])
(define_insn "vsx_xscvdpspn_scalar" (define_insn "vsx_xscvdpspn_scalar"
[(set (match_operand:V4SF 0 "vsx_register_operand" "=wf,?wa") [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa")
(unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "ww,ww")] (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "ww")]
UNSPEC_VSX_CVDPSPN))] UNSPEC_VSX_CVDPSPN))]
"TARGET_XSCVDPSPN" "TARGET_XSCVDPSPN"
"xscvdpspn %x0,%x1" "xscvdpspn %x0,%x1"
......
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