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lvzhengyang
riscv-gcc-1
Commits
57895947
Commit
57895947
authored
Mar 25, 2013
by
Eric Botcazou
Committed by
Eric Botcazou
Mar 25, 2013
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* postreload.c (reload_combine): Fix code detecting returns.
From-SVN: r197037
parent
1e1b18c1
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gcc/ChangeLog
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gcc/postreload.c
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gcc/ChangeLog
View file @
57895947
2013-03-25 Eric Botcazou <ebotcazou@adacore.com>
* postreload.c (reload_combine): Fix code detecting returns.
2013-03-25 Eric Botcazou <ebotcazou@adacore.com>
* function.c (emit_use_return_register_into_block): On cc0 targets,
do not emit the sequence between cc0 setter and user.
...
...
gcc/postreload.c
View file @
57895947
...
...
@@ -1387,7 +1387,7 @@ reload_combine (void)
}
}
if
(
control_flow_insn
&&
GET_CODE
(
PATTERN
(
insn
))
!=
RETURN
)
if
(
control_flow_insn
&&
!
ANY_RETURN_P
(
PATTERN
(
insn
))
)
{
/* Non-spill registers might be used at the call destination in
some unknown fashion, so we have to mark the unknown use. */
...
...
@@ -1395,13 +1395,19 @@ reload_combine (void)
if
((
condjump_p
(
insn
)
||
condjump_in_parallel_p
(
insn
))
&&
JUMP_LABEL
(
insn
))
live
=
&
LABEL_LIVE
(
JUMP_LABEL
(
insn
));
{
if
(
ANY_RETURN_P
(
JUMP_LABEL
(
insn
)))
live
=
NULL
;
else
live
=
&
LABEL_LIVE
(
JUMP_LABEL
(
insn
));
}
else
live
=
&
ever_live_at_start
;
for
(
r
=
0
;
r
<
FIRST_PSEUDO_REGISTER
;
r
++
)
if
(
TEST_HARD_REG_BIT
(
*
live
,
r
))
reg_state
[
r
].
use_index
=
-
1
;
if
(
live
)
for
(
r
=
0
;
r
<
FIRST_PSEUDO_REGISTER
;
r
++
)
if
(
TEST_HARD_REG_BIT
(
*
live
,
r
))
reg_state
[
r
].
use_index
=
-
1
;
}
reload_combine_note_use
(
&
PATTERN
(
insn
),
insn
,
reload_combine_ruid
,
...
...
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