or1k: only force reg for immediates

The force_reg in or1k_expand_compare is hard coded for SImode, which is fine as
this used to only be used on SI expands.  However, with FP support this will
cause issues.  In general we should only force the right hand operand to a
register if its an immediate.  This patch adds an condition to check for that.

gcc/ChangeLog:

	* config/or1k/or1k.c (or1k_expand_compare): Check for int before
	force_reg.

From-SVN: r273651

gcc/ChangeLog

 2019-07-22  Stafford Horne  <shorne@gmail.com>
 
+	* config/or1k/or1k.c (or1k_expand_compare): Check for int before
+	force_reg.
+
+2019-07-22  Stafford Horne  <shorne@gmail.com>
+
 	* config.gcc (or1k*-*-*): Add mhard-float, mdouble-float, msoft-float
 	and munordered-float validations.
 	* config/or1k/constraints.md (d): New register constraint.

gcc/config/or1k/or1k.c

@@ -1448,13 +1448,15 @@ void
 or1k_expand_compare (rtx *operands)
 {
   rtx sr_f = gen_rtx_REG (BImode, SR_F_REGNUM);
+  rtx righthand_op = XEXP (operands[0], 1);
   rtx_code cmp_code = GET_CODE (operands[0]);
   bool flag_check_ne = true;
 
-  /* The RTL may receive an immediate in argument 1 of the compare, this is not
-     supported unless we have l.sf*i instructions, force them into registers.  */
-  if (!TARGET_SFIMM)
-    XEXP (operands[0], 1) = force_reg (SImode, XEXP (operands[0], 1));
+  /* Integer RTL may receive an immediate in argument 1 of the compare, this is
+     not supported unless we have l.sf*i instructions, force them into
+     registers.  */
+  if (!TARGET_SFIMM && CONST_INT_P (righthand_op))
+    XEXP (operands[0], 1) = force_reg (SImode, righthand_op);
 
   /* Normalize comparison operators to ones OpenRISC support.  */
   switch (cmp_code)