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riscv-gcc-1
Commit 56bab446 by Steven Bosscher Committed by Steven Bosscher
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ppro.md: Rewrite as a DFA pipeline description. 

	* ppro.md: Rewrite as a DFA pipeline description.
	* i386.md: Remove all uses of the ppro_uops attribute.
	* i386.c: (ix86_safe_ppro_uops, ix86_dump_ppro_packet,
	ix86_reorder_insn, ix86_sched_reorder_ppro, ix86_sched_init,
	ix86_sched_reorder, ix86_variable_issue,
	struct ix86_sched_data, TARGET_SCHED_VARIABLE_ISSUE,
	TARGET_SCHED_INIT, TARGET_SCHED_REORDER): Remove.
	(ia32_use_dfa_pipeline_interface): Add TARGET_PENTIUMPRO.
	(ia32_multipass_dfa_lookahead): Add TARGET_PENTIUMPRO.
	* athlon.md (athlon_ssecmp_load): Fix comment

From-SVN: r78933
parent 5a26b329
Showing with 24 additions and 250 deletions
gcc/ChangeLog
2004-03-04 Steven Bosscher <stevenb@suse.de>
* ppro.md: Rewrite as a DFA pipeline description.
* i386.md: Remove all uses of the ppro_uops attribute.
* i386.c: (ix86_safe_ppro_uops, ix86_dump_ppro_packet,
ix86_reorder_insn, ix86_sched_reorder_ppro, ix86_sched_init,
ix86_sched_reorder, ix86_variable_issue,
struct ix86_sched_data, TARGET_SCHED_VARIABLE_ISSUE,
TARGET_SCHED_INIT, TARGET_SCHED_REORDER): Remove.
(ia32_use_dfa_pipeline_interface): Add TARGET_PENTIUMPRO.
(ia32_multipass_dfa_lookahead): Add TARGET_PENTIUMPRO.
* athlon.md (athlon_ssecmp_load): Fix comment
2004-03-04 Stuart Hastings <stuart@apple.com>
* gcc/doc/invoke.texi: Document -mlongcall for Darwin/PPC.
2004-03-04 Stuart Hastings <stuart@apple.com>
* gcc/config/i386/darwin.h: Darwin/x86 doesn't support CPUs before
686, tell Darwin assembler to allow prefetch insns, non-empty def
of SUBTARGET_OPTION_TRANSLATE_TABLE.
......
gcc/config/i386/athlon.md
......@@ -581,7 +581,7 @@
(and (eq_attr "cpu" "k8")
(eq_attr "type" "sselog"))
"athlon-double,athlon-fpsched,athlon-fmul")
;; ??? pcmp executes in addmul, probably not wortwhile to brother about that.
;; ??? pcmp executes in addmul, probably not worthwhile to bother about that.
(define_insn_reservation "athlon_ssecmp_load" 2
(and (eq_attr "cpu" "athlon")
(and (eq_attr "type" "ssecmp")
......
gcc/config/i386/i386.c
......@@ -806,9 +806,6 @@ static rtx gen_push (rtx);
static int memory_address_length (rtx addr);
static int ix86_flags_dependant (rtx, rtx, enum attr_type);
static int ix86_agi_dependant (rtx, rtx, enum attr_type);
static enum attr_ppro_uops ix86_safe_ppro_uops (rtx);
static void ix86_dump_ppro_packet (FILE *);
static void ix86_reorder_insn (rtx *, rtx *);
static struct machine_function * ix86_init_machine_status (void);
static int ix86_split_to_parts (rtx, rtx *, enum machine_mode);
static int ix86_nsaved_regs (void);
......@@ -816,16 +813,12 @@ static void ix86_emit_save_regs (void);
static void ix86_emit_save_regs_using_mov (rtx, HOST_WIDE_INT);
static void ix86_emit_restore_regs_using_mov (rtx, HOST_WIDE_INT, int);
static void ix86_output_function_epilogue (FILE *, HOST_WIDE_INT);
static void ix86_sched_reorder_ppro (rtx *, rtx *);
static HOST_WIDE_INT ix86_GOT_alias_set (void);
static void ix86_adjust_counter (rtx, HOST_WIDE_INT);
static rtx ix86_expand_aligntest (rtx, int);
static void ix86_expand_strlensi_unroll_1 (rtx, rtx, rtx);
static int ix86_issue_rate (void);
static int ix86_adjust_cost (rtx, rtx, rtx, int);
static void ix86_sched_init (FILE *, int, int);
static int ix86_sched_reorder (FILE *, int, rtx *, int *, int);
static int ix86_variable_issue (FILE *, int, rtx, int);
static int ia32_use_dfa_pipeline_interface (void);
static int ia32_multipass_dfa_lookahead (void);
static void ix86_init_mmx_sse_builtins (void);
......@@ -975,12 +968,6 @@ static void init_ext_80387_constants (void);
#define TARGET_SCHED_ADJUST_COST ix86_adjust_cost
#undef TARGET_SCHED_ISSUE_RATE
#define TARGET_SCHED_ISSUE_RATE ix86_issue_rate
#undef TARGET_SCHED_VARIABLE_ISSUE
#define TARGET_SCHED_VARIABLE_ISSUE ix86_variable_issue
#undef TARGET_SCHED_INIT
#define TARGET_SCHED_INIT ix86_sched_init
#undef TARGET_SCHED_REORDER
#define TARGET_SCHED_REORDER ix86_sched_reorder
#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \
ia32_use_dfa_pipeline_interface
......@@ -12321,244 +12308,12 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
return cost;
}
static union
{
struct ppro_sched_data
{
rtx decode[3];
int issued_this_cycle;
} ppro;
} ix86_sched_data;
static enum attr_ppro_uops
ix86_safe_ppro_uops (rtx insn)
{
if (recog_memoized (insn) >= 0)
return get_attr_ppro_uops (insn);
else
return PPRO_UOPS_MANY;
}
static void
ix86_dump_ppro_packet (FILE *dump)
{
if (ix86_sched_data.ppro.decode[0])
{
fprintf (dump, "PPRO packet: %d",
INSN_UID (ix86_sched_data.ppro.decode[0]));
if (ix86_sched_data.ppro.decode[1])
fprintf (dump, " %d", INSN_UID (ix86_sched_data.ppro.decode[1]));
if (ix86_sched_data.ppro.decode[2])
fprintf (dump, " %d", INSN_UID (ix86_sched_data.ppro.decode[2]));
fputc ('\n', dump);
}
}
/* We're beginning a new block. Initialize data structures as necessary. */
static void
ix86_sched_init (FILE *dump ATTRIBUTE_UNUSED,
int sched_verbose ATTRIBUTE_UNUSED,
int veclen ATTRIBUTE_UNUSED)
{
memset (&ix86_sched_data, 0, sizeof (ix86_sched_data));
}
/* Shift INSN to SLOT, and shift everything else down. */
static void
ix86_reorder_insn (rtx *insnp, rtx *slot)
{
if (insnp != slot)
{
rtx insn = *insnp;
do
insnp[0] = insnp[1];
while (++insnp != slot);
*insnp = insn;
}
}
static void
ix86_sched_reorder_ppro (rtx *ready, rtx *e_ready)
{
rtx decode[3];
enum attr_ppro_uops cur_uops;
int issued_this_cycle;
rtx *insnp;
int i;
/* At this point .ppro.decode contains the state of the three
decoders from last "cycle". That is, those insns that were
actually independent. But here we're scheduling for the
decoder, and we may find things that are decodable in the
same cycle. */
memcpy (decode, ix86_sched_data.ppro.decode, sizeof (decode));
issued_this_cycle = 0;
insnp = e_ready;
cur_uops = ix86_safe_ppro_uops (*insnp);
/* If the decoders are empty, and we've a complex insn at the
head of the priority queue, let it issue without complaint. */
if (decode[0] == NULL)
{
if (cur_uops == PPRO_UOPS_MANY)
{
decode[0] = *insnp;
goto ppro_done;
}
/* Otherwise, search for a 2-4 uop unsn to issue. */
while (cur_uops != PPRO_UOPS_FEW)
{
if (insnp == ready)
break;
cur_uops = ix86_safe_ppro_uops (*--insnp);
}
/* If so, move it to the head of the line. */
if (cur_uops == PPRO_UOPS_FEW)
ix86_reorder_insn (insnp, e_ready);
/* Issue the head of the queue. */
issued_this_cycle = 1;
decode[0] = *e_ready--;
}
/* Look for simple insns to fill in the other two slots. */
for (i = 1; i < 3; ++i)
if (decode[i] == NULL)
{
if (ready > e_ready)
goto ppro_done;
insnp = e_ready;
cur_uops = ix86_safe_ppro_uops (*insnp);
while (cur_uops != PPRO_UOPS_ONE)
{
if (insnp == ready)
break;
cur_uops = ix86_safe_ppro_uops (*--insnp);
}
/* Found one. Move it to the head of the queue and issue it. */
if (cur_uops == PPRO_UOPS_ONE)
{
ix86_reorder_insn (insnp, e_ready);
decode[i] = *e_ready--;
issued_this_cycle++;
continue;
}
/* ??? Didn't find one. Ideally, here we would do a lazy split
of 2-uop insns, issue one and queue the other. */
}
ppro_done:
if (issued_this_cycle == 0)
issued_this_cycle = 1;
ix86_sched_data.ppro.issued_this_cycle = issued_this_cycle;
}
/* We are about to being issuing insns for this clock cycle.
Override the default sort algorithm to better slot instructions. */
static int
ix86_sched_reorder (FILE *dump ATTRIBUTE_UNUSED,
int sched_verbose ATTRIBUTE_UNUSED, rtx *ready,
int *n_readyp, int clock_var ATTRIBUTE_UNUSED)
{
int n_ready = *n_readyp;
rtx *e_ready = ready + n_ready - 1;
/* Make sure to go ahead and initialize key items in
ix86_sched_data if we are not going to bother trying to
reorder the ready queue. */
if (n_ready < 2)
{
ix86_sched_data.ppro.issued_this_cycle = 1;
goto out;
}
switch (ix86_tune)
{
default:
break;
case PROCESSOR_PENTIUMPRO:
ix86_sched_reorder_ppro (ready, e_ready);
break;
}
out:
return ix86_issue_rate ();
}
/* We are about to issue INSN. Return the number of insns left on the
ready queue that can be issued this cycle. */
static int
ix86_variable_issue (FILE *dump, int sched_verbose, rtx insn,
int can_issue_more)
{
int i;
switch (ix86_tune)
{
default:
return can_issue_more - 1;
case PROCESSOR_PENTIUMPRO:
{
enum attr_ppro_uops uops = ix86_safe_ppro_uops (insn);
if (uops == PPRO_UOPS_MANY)
{
if (sched_verbose)
ix86_dump_ppro_packet (dump);
ix86_sched_data.ppro.decode[0] = insn;
ix86_sched_data.ppro.decode[1] = NULL;
ix86_sched_data.ppro.decode[2] = NULL;
if (sched_verbose)
ix86_dump_ppro_packet (dump);
ix86_sched_data.ppro.decode[0] = NULL;
}
else if (uops == PPRO_UOPS_FEW)
{
if (sched_verbose)
ix86_dump_ppro_packet (dump);
ix86_sched_data.ppro.decode[0] = insn;
ix86_sched_data.ppro.decode[1] = NULL;
ix86_sched_data.ppro.decode[2] = NULL;
}
else
{
for (i = 0; i < 3; ++i)
if (ix86_sched_data.ppro.decode[i] == NULL)
{
ix86_sched_data.ppro.decode[i] = insn;
break;
}
if (i == 3)
abort ();
if (i == 2)
{
if (sched_verbose)
ix86_dump_ppro_packet (dump);
ix86_sched_data.ppro.decode[0] = NULL;
ix86_sched_data.ppro.decode[1] = NULL;
ix86_sched_data.ppro.decode[2] = NULL;
}
}
}
return --ix86_sched_data.ppro.issued_this_cycle;
}
}
static int
ia32_use_dfa_pipeline_interface (void)
{
if (TARGET_PENTIUM || TARGET_ATHLON_K8)
if (TARGET_PENTIUM
|| TARGET_PENTIUMPRO
|| TARGET_ATHLON_K8)
return 1;
return 0;
}
......@@ -12572,8 +12327,12 @@ ia32_multipass_dfa_lookahead (void)
{
if (ix86_tune == PROCESSOR_PENTIUM)
return 2;
if (ix86_tune == PROCESSOR_PENTIUMPRO)
return 1;
else
return 0;
return 0;
}
......
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