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riscv-gcc-1
Commit 55eb155c by Jim Wilson
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entered into RCS 

From-SVN: r1105
parent 5e32e83b
Showing with 22 additions and 16 deletions
gcc/config/i960/i960.h
...@@ -292,6 +292,12 @@ extern int target_flags; ...@@ -292,6 +292,12 @@ extern int target_flags;
flag_signed_char = 1; \ flag_signed_char = 1; \
target_flags |= TARGET_FLAG_CLEAN_LINKAGE; \ target_flags |= TARGET_FLAG_CLEAN_LINKAGE; \
} \ } \
/* ??? Function inlining is not supported, because the i960 \
calling convention requires the caller to manage the arg \
pointer in a wierd fashion. This is ordinarily done by \
expand_call, but this is never called when inlining \
functions, and no replacement for it exists. */ \
flag_no_inline = 1; \
i960_initialize (); \ i960_initialize (); \
} }
......
gcc/config/i960/i960.md
...@@ -548,7 +548,7 @@ ...@@ -548,7 +548,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "general_operand" "=d,d,d,m") [(set (match_operand:SI 0 "general_operand" "=d,d,d,m")
(match_operand:SI 1 "general_operand" "dI,i,m,dJ"))] (match_operand:SI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], SImode) && (register_operand (operands[0], SImode)
|| register_operand (operands[1], SImode) || register_operand (operands[1], SImode)
|| operands[1] == const0_rtx)" || operands[1] == const0_rtx)"
...@@ -581,7 +581,7 @@ ...@@ -581,7 +581,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "general_operand" "=d,d,d,m") [(set (match_operand:SI 0 "general_operand" "=d,d,d,m")
(match_operand:SI 1 "general_operand" "dI,i,m,d"))] (match_operand:SI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], SImode) && (register_operand (operands[0], SImode)
|| register_operand (operands[1], SImode))" || register_operand (operands[1], SImode))"
"* "*
...@@ -625,7 +625,7 @@ ...@@ -625,7 +625,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:HI 0 "general_operand" "=d,d,d,m") [(set (match_operand:HI 0 "general_operand" "=d,d,d,m")
(match_operand:HI 1 "general_operand" "dI,i,m,dJ"))] (match_operand:HI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], HImode) && (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode) || register_operand (operands[1], HImode)
|| operands[1] == const0_rtx)" || operands[1] == const0_rtx)"
...@@ -659,7 +659,7 @@ ...@@ -659,7 +659,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:HI 0 "general_operand" "=d,d,d,m") [(set (match_operand:HI 0 "general_operand" "=d,d,d,m")
(match_operand:HI 1 "general_operand" "dI,i,m,d"))] (match_operand:HI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], HImode) && (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))" || register_operand (operands[1], HImode))"
"* "*
...@@ -700,7 +700,7 @@ ...@@ -700,7 +700,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:QI 0 "general_operand" "=d,d,d,m") [(set (match_operand:QI 0 "general_operand" "=d,d,d,m")
(match_operand:QI 1 "general_operand" "dI,i,m,dJ"))] (match_operand:QI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], QImode) && (register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode) || register_operand (operands[1], QImode)
|| operands[1] == const0_rtx)" || operands[1] == const0_rtx)"
...@@ -734,7 +734,7 @@ ...@@ -734,7 +734,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:QI 0 "general_operand" "=d,d,d,m") [(set (match_operand:QI 0 "general_operand" "=d,d,d,m")
(match_operand:QI 1 "general_operand" "dI,i,m,d"))] (match_operand:QI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], QImode) && (register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))" || register_operand (operands[1], QImode))"
"* "*
...@@ -775,7 +775,7 @@ ...@@ -775,7 +775,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:DI 0 "general_operand" "=d,d,d,m") [(set (match_operand:DI 0 "general_operand" "=d,d,d,m")
(match_operand:DI 1 "general_operand" "dI,i,m,dJ"))] (match_operand:DI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], DImode) && (register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode) || register_operand (operands[1], DImode)
|| operands[1] == const0_rtx)" || operands[1] == const0_rtx)"
...@@ -801,7 +801,7 @@ ...@@ -801,7 +801,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:DI 0 "general_operand" "=d,d,d,m") [(set (match_operand:DI 0 "general_operand" "=d,d,d,m")
(match_operand:DI 1 "general_operand" "dI,i,m,d"))] (match_operand:DI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], DImode) && (register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode))" || register_operand (operands[1], DImode))"
"* "*
...@@ -834,7 +834,7 @@ ...@@ -834,7 +834,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:TI 0 "general_operand" "=d,d,d,m") [(set (match_operand:TI 0 "general_operand" "=d,d,d,m")
(match_operand:TI 1 "general_operand" "dI,i,m,dJ"))] (match_operand:TI 1 "general_operand" "dI,i,m,dJ"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], TImode) && (register_operand (operands[0], TImode)
|| register_operand (operands[1], TImode) || register_operand (operands[1], TImode)
|| operands[1] == const0_rtx)" || operands[1] == const0_rtx)"
...@@ -860,7 +860,7 @@ ...@@ -860,7 +860,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:TI 0 "general_operand" "=d,d,d,m") [(set (match_operand:TI 0 "general_operand" "=d,d,d,m")
(match_operand:TI 1 "general_operand" "dI,i,m,d"))] (match_operand:TI 1 "general_operand" "dI,i,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], TImode) && (register_operand (operands[0], TImode)
|| register_operand (operands[1], TImode))" || register_operand (operands[1], TImode))"
"* "*
...@@ -947,7 +947,7 @@ ...@@ -947,7 +947,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m") [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m")
(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,dG"))] (match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], DFmode) && (register_operand (operands[0], DFmode)
|| register_operand (operands[1], DFmode) || register_operand (operands[1], DFmode)
|| operands[1] == CONST0_RTX (DFmode))" || operands[1] == CONST0_RTX (DFmode))"
...@@ -977,7 +977,7 @@ ...@@ -977,7 +977,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m") [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m")
(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d"))] (match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], DFmode) && (register_operand (operands[0], DFmode)
|| register_operand (operands[1], DFmode))" || register_operand (operands[1], DFmode))"
"* "*
...@@ -1014,7 +1014,7 @@ ...@@ -1014,7 +1014,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m") [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,dG"))] (match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], SFmode) && (register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode) || register_operand (operands[1], SFmode)
|| operands[1] == CONST0_RTX (SFmode))" || operands[1] == CONST0_RTX (SFmode))"
...@@ -1044,7 +1044,7 @@ ...@@ -1044,7 +1044,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m") [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,d"))] (match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], SFmode) && (register_operand (operands[0], SFmode)
|| register_operand (operands[1], SFmode))" || register_operand (operands[1], SFmode))"
"* "*
...@@ -1858,7 +1858,7 @@ ...@@ -1858,7 +1858,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m") [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m")
(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,dG"))] (match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
"current_function_args_size <= 48 "current_function_args_size == 0
&& (register_operand (operands[0], TFmode) && (register_operand (operands[0], TFmode)
|| register_operand (operands[1], TFmode) || register_operand (operands[1], TFmode)
|| operands[1] == CONST0_RTX (TFmode))" || operands[1] == CONST0_RTX (TFmode))"
...@@ -1888,7 +1888,7 @@ ...@@ -1888,7 +1888,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m") [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m")
(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d"))] (match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size > 48 "current_function_args_size != 0
&& (register_operand (operands[0], TFmode) && (register_operand (operands[0], TFmode)
|| register_operand (operands[1], TFmode))" || register_operand (operands[1], TFmode))"
"* "*
......
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