Commit 55d796da by Kaveh R. Ghazi Committed by Kaveh Ghazi

recog.c (validate_change_1, [...]): Avoid C++ keywords.

	* recog.c (validate_change_1, validate_change,
	validate_unshare_change, validate_replace_rtx_1, struct
	funny_match, constrain_operands, peephole2_optimize): Avoid C++
	keywords.
	* reload.c (push_secondary_reload, secondary_reload_class,
	scratch_reload_class, find_valid_class, find_reusable_reload,
	push_reload, find_dummy_reload, find_reloads_address_1,
	find_reloads_address_part, find_equiv_reg): Likewise.
	* reload1.c (spill_failure, eliminate_regs_1, allocate_reload_reg,
	choose_reload_regs): Likewise.
	* rtlanal.c (replace_rtx, nonzero_bits1, num_sign_bit_copies1):
	Likewise.
	* rtlhooks.c (gen_lowpart_if_possible): Likewise.
	* sched-ebb.c (add_deps_for_risky_insns): Likewise.
	* sched-rgn.c (concat_INSN_LIST): Likewise.
	* stor-layout.c (mode_for_size, mode_for_size_tree,
	smallest_mode_for_size): Likewise.

From-SVN: r137894
parent d858f359
2008-07-16 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* recog.c (validate_change_1, validate_change,
validate_unshare_change, validate_replace_rtx_1, struct
funny_match, constrain_operands, peephole2_optimize): Avoid C++
keywords.
* reload.c (push_secondary_reload, secondary_reload_class,
scratch_reload_class, find_valid_class, find_reusable_reload,
push_reload, find_dummy_reload, find_reloads_address_1,
find_reloads_address_part, find_equiv_reg): Likewise.
* reload1.c (spill_failure, eliminate_regs_1, allocate_reload_reg,
choose_reload_regs): Likewise.
* rtlanal.c (replace_rtx, nonzero_bits1, num_sign_bit_copies1):
Likewise.
* rtlhooks.c (gen_lowpart_if_possible): Likewise.
* sched-ebb.c (add_deps_for_risky_insns): Likewise.
* sched-rgn.c (concat_INSN_LIST): Likewise.
* stor-layout.c (mode_for_size, mode_for_size_tree,
smallest_mode_for_size): Likewise.
2008-07-16 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* cfg.c (dump_reg_info): Avoid C++ keywords.
* dwarf2asm.c (dw2_force_const_mem,
dw2_asm_output_encoded_addr_rtx): Likewise.
......
......@@ -183,7 +183,7 @@ static int changes_allocated;
static int num_changes = 0;
/* Validate a proposed change to OBJECT. LOC is the location in the rtl
at which NEW will be placed. If OBJECT is zero, no validation is done,
at which NEW_RTX will be placed. If OBJECT is zero, no validation is done,
the change is simply made.
Two types of objects are supported: If OBJECT is a MEM, memory_address_p
......@@ -201,16 +201,16 @@ static int num_changes = 0;
Otherwise, perform the change and return 1. */
static bool
validate_change_1 (rtx object, rtx *loc, rtx new, bool in_group, bool unshare)
validate_change_1 (rtx object, rtx *loc, rtx new_rtx, bool in_group, bool unshare)
{
rtx old = *loc;
if (old == new || rtx_equal_p (old, new))
if (old == new_rtx || rtx_equal_p (old, new_rtx))
return 1;
gcc_assert (in_group != 0 || num_changes == 0);
*loc = new;
*loc = new_rtx;
/* Save the information describing this change. */
if (num_changes >= changes_allocated)
......@@ -253,18 +253,18 @@ validate_change_1 (rtx object, rtx *loc, rtx new, bool in_group, bool unshare)
UNSHARE to false. */
bool
validate_change (rtx object, rtx *loc, rtx new, bool in_group)
validate_change (rtx object, rtx *loc, rtx new_rtx, bool in_group)
{
return validate_change_1 (object, loc, new, in_group, false);
return validate_change_1 (object, loc, new_rtx, in_group, false);
}
/* Wrapper for validate_change_1 without the UNSHARE argument defaulting
UNSHARE to true. */
bool
validate_unshare_change (rtx object, rtx *loc, rtx new, bool in_group)
validate_unshare_change (rtx object, rtx *loc, rtx new_rtx, bool in_group)
{
return validate_change_1 (object, loc, new, in_group, true);
return validate_change_1 (object, loc, new_rtx, in_group, true);
}
......@@ -525,7 +525,7 @@ validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object)
enum rtx_code code;
enum machine_mode op0_mode = VOIDmode;
int prev_changes = num_changes;
rtx new;
rtx new_rtx;
if (!x)
return;
......@@ -633,25 +633,25 @@ validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object)
case SIGN_EXTEND:
if (GET_MODE (XEXP (x, 0)) == VOIDmode)
{
new = simplify_gen_unary (code, GET_MODE (x), XEXP (x, 0),
new_rtx = simplify_gen_unary (code, GET_MODE (x), XEXP (x, 0),
op0_mode);
/* If any of the above failed, substitute in something that
we know won't be recognized. */
if (!new)
new = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
validate_change (object, loc, new, 1);
if (!new_rtx)
new_rtx = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
validate_change (object, loc, new_rtx, 1);
}
break;
case SUBREG:
/* All subregs possible to simplify should be simplified. */
new = simplify_subreg (GET_MODE (x), SUBREG_REG (x), op0_mode,
new_rtx = simplify_subreg (GET_MODE (x), SUBREG_REG (x), op0_mode,
SUBREG_BYTE (x));
/* Subregs of VOIDmode operands are incorrect. */
if (!new && GET_MODE (SUBREG_REG (x)) == VOIDmode)
new = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
if (new)
validate_change (object, loc, new, 1);
if (!new_rtx && GET_MODE (SUBREG_REG (x)) == VOIDmode)
new_rtx = gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
if (new_rtx)
validate_change (object, loc, new_rtx, 1);
break;
case ZERO_EXTRACT:
case SIGN_EXTRACT:
......@@ -2200,7 +2200,7 @@ preprocess_constraints (void)
struct funny_match
{
int this, other;
int this_op, other;
};
int
......@@ -2350,7 +2350,7 @@ constrain_operands (int strict)
output op is the one that will be printed. */
if (val == 2 && strict > 0)
{
funny_match[funny_match_index].this = opno;
funny_match[funny_match_index].this_op = opno;
funny_match[funny_match_index++].other = match;
}
}
......@@ -2583,7 +2583,7 @@ constrain_operands (int strict)
while (--funny_match_index >= 0)
{
recog_data.operand[funny_match[funny_match_index].other]
= recog_data.operand[funny_match[funny_match_index].this];
= recog_data.operand[funny_match[funny_match_index].this_op];
}
return 1;
......@@ -2987,7 +2987,7 @@ peephole2_optimize (void)
prev = PREV_INSN (insn);
if (INSN_P (insn))
{
rtx try, before_try, x;
rtx attempt, before_try, x;
int match_len;
rtx note;
bool was_call = false;
......@@ -3008,13 +3008,13 @@ peephole2_optimize (void)
substitution would lose the
REG_FRAME_RELATED_EXPR that is attached. */
peep2_current_count = 0;
try = NULL;
attempt = NULL;
}
else
/* Match the peephole. */
try = peephole2_insns (PATTERN (insn), insn, &match_len);
attempt = peephole2_insns (PATTERN (insn), insn, &match_len);
if (try != NULL)
if (attempt != NULL)
{
/* If we are splitting a CALL_INSN, look for the CALL_INSN
in SEQ and copy our CALL_INSN_FUNCTION_USAGE and other
......@@ -3032,7 +3032,7 @@ peephole2_optimize (void)
continue;
was_call = true;
new_insn = try;
new_insn = attempt;
while (new_insn != NULL_RTX)
{
if (CALL_P (new_insn))
......@@ -3080,7 +3080,7 @@ peephole2_optimize (void)
REG_EH_REGION, NULL_RTX);
/* Replace the old sequence with the new. */
try = emit_insn_after_setloc (try, peep2_insn_data[i].insn,
attempt = emit_insn_after_setloc (attempt, peep2_insn_data[i].insn,
INSN_LOCATOR (peep2_insn_data[i].insn));
before_try = PREV_INSN (insn);
delete_insn_chain (insn, peep2_insn_data[i].insn, false);
......@@ -3095,7 +3095,7 @@ peephole2_optimize (void)
if (eh_edge->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
break;
for (x = try ; x != before_try ; x = PREV_INSN (x))
for (x = attempt ; x != before_try ; x = PREV_INSN (x))
if (CALL_P (x)
|| (flag_non_call_exceptions
&& may_trap_p (PATTERN (x))
......@@ -3145,7 +3145,7 @@ peephole2_optimize (void)
bitmap_copy (live, peep2_insn_data[i].live_before);
/* Update life information for the new sequence. */
x = try;
x = attempt;
do
{
if (INSN_P (x))
......@@ -3169,7 +3169,7 @@ peephole2_optimize (void)
/* If we generated a jump instruction, it won't have
JUMP_LABEL set. Recompute after we're done. */
for (x = try; x != before_try; x = PREV_INSN (x))
for (x = attempt; x != before_try; x = PREV_INSN (x))
if (JUMP_P (x))
{
do_rebuild_jump_labels = true;
......
......@@ -1976,16 +1976,16 @@ delete_caller_save_insns (void)
INSN should be one of the insns which needed this particular spill reg. */
static void
spill_failure (rtx insn, enum reg_class class)
spill_failure (rtx insn, enum reg_class rclass)
{
if (asm_noperands (PATTERN (insn)) >= 0)
error_for_asm (insn, "can't find a register in class %qs while "
"reloading %<asm%>",
reg_class_names[class]);
reg_class_names[rclass]);
else
{
error ("unable to find a register to spill in class %qs",
reg_class_names[class]);
reg_class_names[rclass]);
if (dump_file)
{
......@@ -2394,7 +2394,7 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
enum rtx_code code = GET_CODE (x);
struct elim_table *ep;
int regno;
rtx new;
rtx new_rtx;
int i, j;
const char *fmt;
int copied = 0;
......@@ -2523,15 +2523,15 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
&& reg_equiv_constant[REGNO (new0)] != 0)
new0 = reg_equiv_constant[REGNO (new0)];
new = form_sum (new0, new1);
new_rtx = form_sum (new0, new1);
/* As above, if we are not inside a MEM we do not want to
turn a PLUS into something else. We might try to do so here
for an addition of 0 if we aren't optimizing. */
if (! mem_mode && GET_CODE (new) != PLUS)
return gen_rtx_PLUS (GET_MODE (x), new, const0_rtx);
if (! mem_mode && GET_CODE (new_rtx) != PLUS)
return gen_rtx_PLUS (GET_MODE (x), new_rtx, const0_rtx);
else
return new;
return new_rtx;
}
}
return x;
......@@ -2588,8 +2588,8 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
/* If we have something in XEXP (x, 0), the usual case, eliminate it. */
if (XEXP (x, 0))
{
new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true);
if (new != XEXP (x, 0))
new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true);
if (new_rtx != XEXP (x, 0))
{
/* If this is a REG_DEAD note, it is not valid anymore.
Using the eliminated version could result in creating a
......@@ -2599,7 +2599,7 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true)
: NULL_RTX);
x = gen_rtx_EXPR_LIST (REG_NOTE_KIND (x), new, XEXP (x, 1));
x = gen_rtx_EXPR_LIST (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
}
}
......@@ -2611,10 +2611,10 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
strictly needed, but it simplifies the code. */
if (XEXP (x, 1))
{
new = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true);
if (new != XEXP (x, 1))
new_rtx = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true);
if (new_rtx != XEXP (x, 1))
return
gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), XEXP (x, 0), new);
gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), XEXP (x, 0), new_rtx);
}
return x;
......@@ -2636,13 +2636,13 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
if (GET_CODE (XEXP (x, 1)) == PLUS
&& XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
{
rtx new = eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
rtx new_rtx = eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
insn, true);
if (new != XEXP (XEXP (x, 1), 1))
if (new_rtx != XEXP (XEXP (x, 1), 1))
return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
gen_rtx_PLUS (GET_MODE (x),
XEXP (x, 0), new));
XEXP (x, 0), new_rtx));
}
return x;
......@@ -2660,9 +2660,9 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
case POPCOUNT:
case PARITY:
case BSWAP:
new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false);
if (new != XEXP (x, 0))
return gen_rtx_fmt_e (code, GET_MODE (x), new);
new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false);
if (new_rtx != XEXP (x, 0))
return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
return x;
case SUBREG:
......@@ -2678,17 +2678,17 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
&& reg_equiv_memory_loc != 0
&& reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0)
{
new = SUBREG_REG (x);
new_rtx = SUBREG_REG (x);
}
else
new = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false);
new_rtx = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false);
if (new != SUBREG_REG (x))
if (new_rtx != SUBREG_REG (x))
{
int x_size = GET_MODE_SIZE (GET_MODE (x));
int new_size = GET_MODE_SIZE (GET_MODE (new));
int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
if (MEM_P (new)
if (MEM_P (new_rtx)
&& ((x_size < new_size
#ifdef WORD_REGISTER_OPERATIONS
/* On these machines, combine can create rtl of the form
......@@ -2704,9 +2704,9 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
)
|| x_size == new_size)
)
return adjust_address_nv (new, GET_MODE (x), SUBREG_BYTE (x));
return adjust_address_nv (new_rtx, GET_MODE (x), SUBREG_BYTE (x));
else
return gen_rtx_SUBREG (GET_MODE (x), new, SUBREG_BYTE (x));
return gen_rtx_SUBREG (GET_MODE (x), new_rtx, SUBREG_BYTE (x));
}
return x;
......@@ -2722,9 +2722,9 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
case USE:
/* Handle insn_list USE that a call to a pure function may generate. */
new = eliminate_regs_1 (XEXP (x, 0), 0, insn, false);
if (new != XEXP (x, 0))
return gen_rtx_USE (GET_MODE (x), new);
new_rtx = eliminate_regs_1 (XEXP (x, 0), 0, insn, false);
if (new_rtx != XEXP (x, 0))
return gen_rtx_USE (GET_MODE (x), new_rtx);
return x;
case CLOBBER:
......@@ -2743,21 +2743,21 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
{
if (*fmt == 'e')
{
new = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false);
if (new != XEXP (x, i) && ! copied)
new_rtx = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false);
if (new_rtx != XEXP (x, i) && ! copied)
{
x = shallow_copy_rtx (x);
copied = 1;
}
XEXP (x, i) = new;
XEXP (x, i) = new_rtx;
}
else if (*fmt == 'E')
{
int copied_vec = 0;
for (j = 0; j < XVECLEN (x, i); j++)
{
new = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false);
if (new != XVECEXP (x, i, j) && ! copied_vec)
new_rtx = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false);
if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
{
rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
XVEC (x, i)->elem);
......@@ -2769,7 +2769,7 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
XVEC (x, i) = new_v;
copied_vec = 1;
}
XVECEXP (x, i, j) = new;
XVECEXP (x, i, j) = new_rtx;
}
}
}
......@@ -5474,7 +5474,7 @@ allocate_reload_reg (struct insn_chain *chain ATTRIBUTE_UNUSED, int r,
for (count = 0; count < n_spills; count++)
{
int class = (int) rld[r].class;
int rclass = (int) rld[r].class;
int regnum;
i++;
......@@ -5491,7 +5491,7 @@ allocate_reload_reg (struct insn_chain *chain ATTRIBUTE_UNUSED, int r,
&& free_for_value_p (regnum, rld[r].mode, rld[r].opnum,
rld[r].when_needed, rld[r].in,
rld[r].out, r, 1)))
&& TEST_HARD_REG_BIT (reg_class_contents[class], regnum)
&& TEST_HARD_REG_BIT (reg_class_contents[rclass], regnum)
&& HARD_REGNO_MODE_OK (regnum, rld[r].mode)
/* Look first for regs to share, then for unshared. But
don't share regs used for inherited reloads; they are
......@@ -5521,7 +5521,7 @@ allocate_reload_reg (struct insn_chain *chain ATTRIBUTE_UNUSED, int r,
while (nr > 1)
{
int regno = regnum + nr - 1;
if (!(TEST_HARD_REG_BIT (reg_class_contents[class], regno)
if (!(TEST_HARD_REG_BIT (reg_class_contents[rclass], regno)
&& spill_reg_order[regno] >= 0
&& reload_reg_free_p (regno, rld[r].opnum,
rld[r].when_needed)))
......@@ -5793,7 +5793,7 @@ choose_reload_regs (struct insn_chain *chain)
#endif
)
{
enum reg_class class = rld[r].class, last_class;
enum reg_class rclass = rld[r].class, last_class;
rtx last_reg = reg_last_reload_reg[regno];
enum machine_mode need_mode;
......@@ -5814,18 +5814,18 @@ choose_reload_regs (struct insn_chain *chain)
&& reg_reloaded_contents[i] == regno
&& TEST_HARD_REG_BIT (reg_reloaded_valid, i)
&& HARD_REGNO_MODE_OK (i, rld[r].mode)
&& (TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)
&& (TEST_HARD_REG_BIT (reg_class_contents[(int) rclass], i)
/* Even if we can't use this register as a reload
register, we might use it for reload_override_in,
if copying it to the desired class is cheap
enough. */
|| ((REGISTER_MOVE_COST (mode, last_class, class)
< MEMORY_MOVE_COST (mode, class, 1))
&& (secondary_reload_class (1, class, mode,
|| ((REGISTER_MOVE_COST (mode, last_class, rclass)
< MEMORY_MOVE_COST (mode, rclass, 1))
&& (secondary_reload_class (1, rclass, mode,
last_reg)
== NO_REGS)
#ifdef SECONDARY_MEMORY_NEEDED
&& ! SECONDARY_MEMORY_NEEDED (last_class, class,
&& ! SECONDARY_MEMORY_NEEDED (last_class, rclass,
mode)
#endif
))
......
......@@ -2470,32 +2470,32 @@ replace_rtx (rtx x, rtx from, rtx to)
if (GET_CODE (x) == SUBREG)
{
rtx new = replace_rtx (SUBREG_REG (x), from, to);
rtx new_rtx = replace_rtx (SUBREG_REG (x), from, to);
if (GET_CODE (new) == CONST_INT)
if (GET_CODE (new_rtx) == CONST_INT)
{
x = simplify_subreg (GET_MODE (x), new,
x = simplify_subreg (GET_MODE (x), new_rtx,
GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
gcc_assert (x);
}
else
SUBREG_REG (x) = new;
SUBREG_REG (x) = new_rtx;
return x;
}
else if (GET_CODE (x) == ZERO_EXTEND)
{
rtx new = replace_rtx (XEXP (x, 0), from, to);
rtx new_rtx = replace_rtx (XEXP (x, 0), from, to);
if (GET_CODE (new) == CONST_INT)
if (GET_CODE (new_rtx) == CONST_INT)
{
x = simplify_unary_operation (ZERO_EXTEND, GET_MODE (x),
new, GET_MODE (XEXP (x, 0)));
new_rtx, GET_MODE (XEXP (x, 0)));
gcc_assert (x);
}
else
XEXP (x, 0) = new;
XEXP (x, 0) = new_rtx;
return x;
}
......@@ -3692,12 +3692,12 @@ nonzero_bits1 (const_rtx x, enum machine_mode mode, const_rtx known_x,
{
unsigned HOST_WIDE_INT nonzero_for_hook = nonzero;
rtx new = rtl_hooks.reg_nonzero_bits (x, mode, known_x,
rtx new_rtx = rtl_hooks.reg_nonzero_bits (x, mode, known_x,
known_mode, known_ret,
&nonzero_for_hook);
if (new)
nonzero_for_hook &= cached_nonzero_bits (new, mode, known_x,
if (new_rtx)
nonzero_for_hook &= cached_nonzero_bits (new_rtx, mode, known_x,
known_mode, known_ret);
return nonzero_for_hook;
......@@ -4177,12 +4177,12 @@ num_sign_bit_copies1 (const_rtx x, enum machine_mode mode, const_rtx known_x,
{
unsigned int copies_for_hook = 1, copies = 1;
rtx new = rtl_hooks.reg_num_sign_bit_copies (x, mode, known_x,
rtx new_rtx = rtl_hooks.reg_num_sign_bit_copies (x, mode, known_x,
known_mode, known_ret,
&copies_for_hook);
if (new)
copies = cached_num_sign_bit_copies (new, mode, known_x,
if (new_rtx)
copies = cached_num_sign_bit_copies (new_rtx, mode, known_x,
known_mode, known_ret);
if (copies > 1 || copies_for_hook > 1)
......
......@@ -141,7 +141,7 @@ gen_lowpart_if_possible (enum machine_mode mode, rtx x)
{
/* This is the only other case we handle. */
int offset = 0;
rtx new;
rtx new_rtx;
if (WORDS_BIG_ENDIAN)
offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
......@@ -152,11 +152,11 @@ gen_lowpart_if_possible (enum machine_mode mode, rtx x)
offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
- MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
new = adjust_address_nv (x, mode, offset);
if (! memory_address_p (mode, XEXP (new, 0)))
new_rtx = adjust_address_nv (x, mode, offset);
if (! memory_address_p (mode, XEXP (new_rtx, 0)))
return 0;
return new;
return new_rtx;
}
else if (mode != GET_MODE (x) && GET_MODE (x) != VOIDmode
&& validate_subreg (mode, GET_MODE (x), x,
......
......@@ -357,7 +357,7 @@ static void
add_deps_for_risky_insns (rtx head, rtx tail)
{
rtx insn, prev;
int class;
int classification;
rtx last_jump = NULL_RTX;
rtx next_tail = NEXT_INSN (tail);
basic_block last_block = NULL, bb;
......@@ -372,9 +372,9 @@ add_deps_for_risky_insns (rtx head, rtx tail)
}
else if (INSN_P (insn) && last_jump != NULL_RTX)
{
class = haifa_classify_insn (insn);
classification = haifa_classify_insn (insn);
prev = last_jump;
switch (class)
switch (classification)
{
case PFREE_CANDIDATE:
if (flag_schedule_speculative_load)
......
......@@ -2388,10 +2388,10 @@ static struct deps *bb_deps;
static rtx
concat_INSN_LIST (rtx copy, rtx old)
{
rtx new = old;
rtx new_rtx = old;
for (; copy ; copy = XEXP (copy, 1))
new = alloc_INSN_LIST (XEXP (copy, 0), new);
return new;
new_rtx = alloc_INSN_LIST (XEXP (copy, 0), new_rtx);
return new_rtx;
}
static void
......
......@@ -163,12 +163,12 @@ variable_size (tree size)
#endif
/* Return the machine mode to use for a nonscalar of SIZE bits. The
mode must be in class CLASS, and have exactly that many value bits;
mode must be in class MCLASS, and have exactly that many value bits;
it may have padding as well. If LIMIT is nonzero, modes of wider
than MAX_FIXED_MODE_SIZE will not be used. */
enum machine_mode
mode_for_size (unsigned int size, enum mode_class class, int limit)
mode_for_size (unsigned int size, enum mode_class mclass, int limit)
{
enum machine_mode mode;
......@@ -176,7 +176,7 @@ mode_for_size (unsigned int size, enum mode_class class, int limit)
return BLKmode;
/* Get the first mode which has this size, in the specified class. */
for (mode = GET_CLASS_NARROWEST_MODE (class); mode != VOIDmode;
for (mode = GET_CLASS_NARROWEST_MODE (mclass); mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
if (GET_MODE_PRECISION (mode) == size)
return mode;
......@@ -187,7 +187,7 @@ mode_for_size (unsigned int size, enum mode_class class, int limit)
/* Similar, except passed a tree node. */
enum machine_mode
mode_for_size_tree (const_tree size, enum mode_class class, int limit)
mode_for_size_tree (const_tree size, enum mode_class mclass, int limit)
{
unsigned HOST_WIDE_INT uhwi;
unsigned int ui;
......@@ -198,20 +198,20 @@ mode_for_size_tree (const_tree size, enum mode_class class, int limit)
ui = uhwi;
if (uhwi != ui)
return BLKmode;
return mode_for_size (ui, class, limit);
return mode_for_size (ui, mclass, limit);
}
/* Similar, but never return BLKmode; return the narrowest mode that
contains at least the requested number of value bits. */
enum machine_mode
smallest_mode_for_size (unsigned int size, enum mode_class class)
smallest_mode_for_size (unsigned int size, enum mode_class mclass)
{
enum machine_mode mode;
/* Get the first mode which has at least this size, in the
specified class. */
for (mode = GET_CLASS_NARROWEST_MODE (class); mode != VOIDmode;
for (mode = GET_CLASS_NARROWEST_MODE (mclass); mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
if (GET_MODE_PRECISION (mode) >= size)
return mode;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment