Generate PADDI to add large constants if -mcpu=future.

2019-12-12  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/predicates.md (add_operand): Allow eI constants.
	* config/rs6000/rs6000.md (add<mode>3): Add alternative to
	generate PADDI for 34-bit constants if -mcpu=future.

From-SVN: r279476

gcc/ChangeLog

@@ -2,10 +2,13 @@
 
 	* config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the
 	constant can be loaded with PLI if -mcpu=future.
-	* config/rs6000/rs6000.md (movdi_internal64): Add alternative to
-	use PLI to load up 34-bit constants if -mcpu=future.
+	* config/rs6000/rs6000.md (add<mode>3): Add alternative to
+	generate PADDI for 34-bit constants if -mcpu=future.
+	(movdi_internal64): Add alternative to use PLI to load up 34-bit
+	constants if -mcpu=future.
 	(movsi_internal1): Add alternative to use PLI to load up 32-bit
 	constants if -mcpu=future.
+	* config/rs6000/predicates.md (add_operand): Allow eI constants.
 
 2019-12-17  Jakub Jelinek  <jakub@redhat.com>
 

gcc/config/rs6000/predicates.md

@@ -839,7 +839,8 @@
 (define_predicate "add_operand"
   (if_then_else (match_code "const_int")
     (match_test "satisfies_constraint_I (op)
-		 || satisfies_constraint_L (op)")
+		 || satisfies_constraint_L (op)
+		 || satisfies_constraint_eI (op)")
     (match_operand 0 "gpc_reg_operand")))
 
 ;; Return 1 if the operand is either a non-special register, or 0, or -1.

gcc/config/rs6000/rs6000.md

@@ -1761,15 +1761,17 @@
 })
 
 (define_insn "*add<mode>3"
-  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r")
-	(plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b")
-		  (match_operand:GPR 2 "add_operand" "r,I,L")))]
+  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r,r")
+	(plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b,b")
+		  (match_operand:GPR 2 "add_operand" "r,I,L,eI")))]
   ""
   "@
    add %0,%1,%2
    addi %0,%1,%2
-   addis %0,%1,%v2"
-  [(set_attr "type" "add")])
+   addis %0,%1,%v2
+   addi %0,%1,%2"
+  [(set_attr "type" "add")
+   (set_attr "isa" "*,*,*,fut")])
 
 (define_insn "*addsi3_high"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=b")