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riscv-gcc-1
Commit 5463c726 by Kazu Hirata Committed by Kazu Hirata
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h8300.c (h8300_init_once): Use MASK_H8300S_1 instead of MASK_H8300S. 

	* config/h8300/h8300.c (h8300_init_once): Use MASK_H8300S_1
	instead of MASK_H8300S.
	* config/h8300/h8300.h (target_flags, MASK_H8300S, MASK_MAC,
	MASK_INT32, MASK_ADDRESSES, MASK_QUICKCALL, MASK_SLOWBYTE,
	MASK_NORMAL_MODE, MASK_RELAX, MASK_H8300H, MASK_ALIGN_300,
	MASK_H8300SX, TARGET_INT32, TARGET_ADDRESSES,
	TARGET_QUICKCALL, TARGET_SLOWBYTE, TARGET_H8300H,
	TARGET_H8300XS, TARGET_NORMAL_MODE, TARGET_ALIGN_300,
	TARGET_SWITCHES): Remove.
	(TARGET_H8300S): Redefine interms of TARGET_H8300S_1 and
	TARGET_H8300SX.
	* config/h8300/h8300.opt: New.

From-SVN: r96616
parent d8e97847
Showing with 59 additions and 73 deletions
gcc/ChangeLog
2005-03-17 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.c (h8300_init_once): Use MASK_H8300S_1
instead of MASK_H8300S.
* config/h8300/h8300.h (target_flags, MASK_H8300S, MASK_MAC,
MASK_INT32, MASK_ADDRESSES, MASK_QUICKCALL, MASK_SLOWBYTE,
MASK_NORMAL_MODE, MASK_RELAX, MASK_H8300H, MASK_ALIGN_300,
MASK_H8300SX, TARGET_INT32, TARGET_ADDRESSES,
TARGET_QUICKCALL, TARGET_SLOWBYTE, TARGET_H8300H,
TARGET_H8300XS, TARGET_NORMAL_MODE, TARGET_ALIGN_300,
TARGET_SWITCHES): Remove.
(TARGET_H8300S): Redefine interms of TARGET_H8300S_1 and
TARGET_H8300SX.
* config/h8300/h8300.opt: New.
2005-03-17 Ian Lance Taylor <ian@airs.com>
* gmon.c: Remove.
......
gcc/config/h8300/h8300.c
......@@ -356,7 +356,7 @@ h8300_init_once (void)
if (!TARGET_H8300S && TARGET_MAC)
{
error ("-ms2600 is used without -ms");
target_flags |= MASK_H8300S;
target_flags |= MASK_H8300S_1;
}
if (TARGET_H8300 && TARGET_NORMAL_MODE)
......
gcc/config/h8300/h8300.h
......@@ -96,86 +96,15 @@ extern const char * const *h8_reg_names;
#define TARGET_VERSION fprintf (stderr, " (Renesas H8/300)");
/* Run-time compilation parameters selecting different hardware subsets. */
extern int target_flags;
/* Masks for the -m switches. */
#define MASK_H8300S 0x00000001
#define MASK_MAC 0x00000002
#define MASK_INT32 0x00000008
#define MASK_ADDRESSES 0x00000040
#define MASK_QUICKCALL 0x00000080
#define MASK_SLOWBYTE 0x00000100
#define MASK_NORMAL_MODE 0x00000200
#define MASK_RELAX 0x00000400
#define MASK_H8300H 0x00001000
#define MASK_ALIGN_300 0x00002000
#define MASK_H8300SX 0x00004000
/* Macros used in the machine description to test the flags. */
/* Make int's 32 bits. */
#define TARGET_INT32 (target_flags & MASK_INT32)
/* Dump recorded insn lengths into the output file. This helps debug the
md file. */
#define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES)
/* Pass the first few arguments in registers. */
#define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL)
/* Pretend byte accesses are slow. */
#define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE)
/* Select between the H8/300 and H8/300H CPUs. */
#define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S)
#define TARGET_H8300H (target_flags & MASK_H8300H)
#define TARGET_H8300S (target_flags & (MASK_H8300S | MASK_H8300SX))
#define TARGET_H8300SX (target_flags & MASK_H8300SX)
#define TARGET_H8300S (TARGET_H8300S_1 || TARGET_H8300SX)
/* Some multiply instructions are not available in all H8SX variants.
Use this macro instead of TARGET_H8300SX to indicate this, even
though we don't actually generate different code for now. */
#define TARGET_H8300SXMUL TARGET_H8300SX
#define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE)
/* mac register and relevant instructions are available. */
#define TARGET_MAC (target_flags & MASK_MAC)
/* Align all values on the H8/300H the same way as the H8/300. Specifically,
32 bit and larger values are aligned on 16 bit boundaries.
This is all the hardware requires, but the default is 32 bits for the H8/300H.
??? Now watch someone add hardware floating point requiring 32 bit
alignment. */
#define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300)
/* Macro to define tables used to set the flags.
This is a list in braces of pairs in braces,
each pair being { "NAME", VALUE }
where VALUE is the bits to set or minus the bits to clear.
An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \
{ {"s", MASK_H8300S, N_("Generate H8S code")}, \
{"no-s", -MASK_H8300S, N_("Do not generate H8S code")}, \
{"sx", MASK_H8300SX, N_("Generate H8SX code")}, \
{"no-sx", -MASK_H8300SX, N_("Do not generate H8SX code")}, \
{"s2600", MASK_MAC, N_("Generate H8S/2600 code")}, \
{"no-s2600", -MASK_MAC, N_("Do not generate H8S/2600 code")}, \
{"int32", MASK_INT32, N_("Make integers 32 bits wide")}, \
{"addresses", MASK_ADDRESSES, NULL}, \
{"quickcall", MASK_QUICKCALL, \
N_("Use registers for argument passing")}, \
{"no-quickcall", -MASK_QUICKCALL, \
N_("Do not use registers for argument passing")}, \
{"slowbyte", MASK_SLOWBYTE, \
N_("Consider access to byte sized memory slow")}, \
{"relax", MASK_RELAX, N_("Enable linker relaxing")}, \
{"h", MASK_H8300H, N_("Generate H8/300H code")}, \
{"n", MASK_NORMAL_MODE, N_("Enable the normal mode")}, \
{"no-h", -MASK_H8300H, N_("Do not generate H8/300H code")}, \
{"align-300", MASK_ALIGN_300, N_("Use H8/300 alignment rules")}, \
{ "", TARGET_DEFAULT, NULL}}
#ifdef IN_LIBGCC2
#undef TARGET_H8300H
......
gcc/config/h8300/h8300.opt 0 → 100644
ms
Target Mask(H8300S_1)
Generate H8S code
msx
Target Mask(H8300SX)
Generate H8SX code
ms2600
Target Mask(MAC)
Generate H8S/2600 code
mint32
Target RejectNegative Mask(INT32)
Make integers 32 bits wide
maddresses
Target Undocumented RejectNegative Mask(ADDRESSES)
mquickcall
Target Mask(QUICKCALL)
Use registers for argument passing
mslowbyte
Target RejectNegative Mask(SLOWBYTE)
Consider access to byte sized memory slow
mrelax
Target RejectNegative Mask(RELAX)
Enable linker relaxing
mh
Target Mask(H8300H)
Generate H8/300H code
mn
Target Mask(NORMAL_MODE)
Enable the normal mode
malign-300
Target RejectNegative Mask(ALIGN_300)
Use H8/300 alignment rules
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