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riscv-gcc-1
Commit 5436efaa by Georg-Johann Lay Committed by Georg-Johann Lay
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avr.h (struct base_arch_s): Add field sfr_offset. 

	* config/avr/avr.h (struct base_arch_s): Add field sfr_offset.
	* config/avr/avr-devices.c: Ditto. And initialize it.
	* config/avr/avr-c.c (avr_cpu_cpp_builtins): New built-in define
	__AVR_SFR_OFFSET__.
	* config/avr/avr-protos.h (out_movqi_r_mr, out_movqi_mr_r): Remove.
	(out_movhi_r_mr, out_movhi_mr_r): Remove.
	(out_movsi_r_mr, out_movsi_mr_r): Remove.
	* config/avr/avr.md (*cbi, *sbi): Use %i instead of %m-0x20.
	(*insv.io, *insv.not.io): Ditto.
	* config/avr/avr.c (out_movsi_r_mr, out_movsi_mr_r): Make static.
	(print_operand): Implement "%i" to print address as I/O address.
	(output_movqi): Clean up call of out_movqi_mr_r.
	(output_movhi): Clean up call of out_movhi_mr_r.
	(avr_file_start): Use avr_current_arch->sfr_offset instead of
	magic -0x20. Use TMP_REGNO, ZERO_REGNO instead of 0, 1.
	(avr_out_sbxx_branch): Use %i instead of %m-0x20.
	(out_movqi_r_mr, out_movqi_mr_r): Ditto. And make static.
	(out_movhi_r_mr, out_movhi_mr_r): Ditto. And use avr_asm_len.
	(out_shift_with_cnt): Clean up code: Use avr_asm_len.
	(output_movsisf): Use output_reload_insisf for all CONSTANT_P sources.
	(avr_out_movpsi): USE avr_out_reload_inpsi for all CONSTANT_P sources.
	Clean up call of avr_out_store_psi.
	(output_reload_in_const): Don't cut symbols longer than 2 bytes.
	(output_reload_insisf): Filter CONST_INT_P or CONST_DOUBLE_P to
	try if setting pre-cleared register is advantageous.
	(avr_out_plus_1): Use gen_int_mode instead of GEN_INT.

From-SVN: r181552
parent 989bdb74
Showing with 81 additions and 47 deletions
gcc/ChangeLog
2011-11-21 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr.h (struct base_arch_s): Add field sfr_offset.
* config/avr/avr-devices.c: Ditto. And initialize it.
* config/avr/avr-c.c (avr_cpu_cpp_builtins): New built-in define
__AVR_SFR_OFFSET__.
* config/avr/avr-protos.h (out_movqi_r_mr, out_movqi_mr_r): Remove.
(out_movhi_r_mr, out_movhi_mr_r): Remove.
(out_movsi_r_mr, out_movsi_mr_r): Remove.
* config/avr/avr.md (*cbi, *sbi): Use %i instead of %m-0x20.
(*insv.io, *insv.not.io): Ditto.
* config/avr/avr.c (out_movsi_r_mr, out_movsi_mr_r): Make static.
(print_operand): Implement "%i" to print address as I/O address.
(output_movqi): Clean up call of out_movqi_mr_r.
(output_movhi): Clean up call of out_movhi_mr_r.
(avr_file_start): Use avr_current_arch->sfr_offset instead of
magic -0x20. Use TMP_REGNO, ZERO_REGNO instead of 0, 1.
(avr_out_sbxx_branch): Use %i instead of %m-0x20.
(out_movqi_r_mr, out_movqi_mr_r): Ditto. And make static.
(out_movhi_r_mr, out_movhi_mr_r): Ditto. And use avr_asm_len.
(out_shift_with_cnt): Clean up code: Use avr_asm_len.
(output_movsisf): Use output_reload_insisf for all CONSTANT_P sources.
(avr_out_movpsi): USE avr_out_reload_inpsi for all CONSTANT_P sources.
Clean up call of avr_out_store_psi.
(output_reload_in_const): Don't cut symbols longer than 2 bytes.
(output_reload_insisf): Filter CONST_INT_P or CONST_DOUBLE_P to
try if setting pre-cleared register is advantageous.
(avr_out_plus_1): Use gen_int_mode instead of GEN_INT.
2011-11-20 Joey Ye <joey.ye@arm.com>
* expr.c (expand_expr_real_1): Correctly handle strict volatile
gcc/config/avr/avr-c.c
......@@ -106,6 +106,9 @@ avr_cpu_cpp_builtins (struct cpp_reader *pfile)
cpp_define (pfile, "__AVR_ERRATA_SKIP_JMP_CALL__");
}
cpp_define_formatted (pfile, "__AVR_SFR_OFFSET__=0x%x",
avr_current_arch->sfr_offset);
/* Define builtin macros so that the user can easily query if or if not
non-generic address spaces (and which) are supported.
This is only supported for C. For C++, a language extension is needed
......
gcc/config/avr/avr-devices.c
......@@ -23,29 +23,30 @@
#include "coretypes.h"
#include "tm.h"
/* List of all known AVR MCU architectures. */
/* List of all known AVR MCU architectures.
Order as of enum avr_arch from avr.h. */
const struct base_arch_s
avr_arch_types[] =
{
/* unknown device specified */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 1, NULL, "avr2" },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, 1, NULL, "avr2" },
/*
A M J L E E E d S # F
S U M P L L I a t 6 l
M L P M P P J - - t a 4 a
X M M M a r s
X P t k h */
{ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 1, "__AVR_ARCH__=1", "avr1" },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 1, "__AVR_ARCH__=2", "avr2" },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0x0060, 1, "__AVR_ARCH__=25", "avr25" },
{ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 1, "__AVR_ARCH__=3", "avr3" },
{ 0, 0, 1, 0, 1, 0, 0, 0, 0, 0x0060, 2, "__AVR_ARCH__=31", "avr31" },
{ 0, 0, 1, 1, 0, 0, 0, 0, 0, 0x0060, 1, "__AVR_ARCH__=35", "avr35" },
{ 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 1, "__AVR_ARCH__=4", "avr4" },
{ 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, 1, "__AVR_ARCH__=5", "avr5" },
{ 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 2, "__AVR_ARCH__=51", "avr51" },
{ 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, 4, "__AVR_ARCH__=6", "avr6" }
A M J LM E E E d S S O # F
S U M PO L L I a t F ff 6 l
M L P MV P P J - - t a R s 4 a
XW M M M a r e s
X P t t k h */
{ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, 1, "__AVR_ARCH__=1", "avr1" },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 32, 1, "__AVR_ARCH__=2", "avr2" },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, 1, "__AVR_ARCH__=25", "avr25" },
{ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 32, 1, "__AVR_ARCH__=3", "avr3" },
{ 0, 0, 1, 0, 1, 0, 0, 0, 0, 0x0060, 32, 2, "__AVR_ARCH__=31", "avr31" },
{ 0, 0, 1, 1, 0, 0, 0, 0, 0, 0x0060, 32, 1, "__AVR_ARCH__=35", "avr35" },
{ 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 32, 1, "__AVR_ARCH__=4", "avr4" },
{ 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, 32, 1, "__AVR_ARCH__=5", "avr5" },
{ 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 32, 2, "__AVR_ARCH__=51", "avr51" },
{ 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, 32, 4, "__AVR_ARCH__=6", "avr6" }
};
const struct mcu_type_s avr_mcu_types[] = {
......
gcc/config/avr/avr-protos.h
......@@ -51,12 +51,6 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype,
#ifdef RTX_CODE
extern const char *output_movqi (rtx insn, rtx operands[], int *l);
extern const char *output_movhi (rtx insn, rtx operands[], int *l);
extern const char *out_movqi_r_mr (rtx insn, rtx op[], int *l);
extern const char *out_movqi_mr_r (rtx insn, rtx op[], int *l);
extern const char *out_movhi_r_mr (rtx insn, rtx op[], int *l);
extern const char *out_movhi_mr_r (rtx insn, rtx op[], int *l);
extern const char *out_movsi_r_mr (rtx insn, rtx op[], int *l);
extern const char *out_movsi_mr_r (rtx insn, rtx op[], int *l);
extern const char *output_movsisf (rtx insn, rtx operands[], int *l);
extern const char *avr_out_tstsi (rtx, rtx*, int*);
extern const char *avr_out_tsthi (rtx, rtx*, int*);
......
gcc/config/avr/avr.h
......@@ -23,7 +23,8 @@ along with GCC; see the file COPYING3. If not see
/* Names to predefine in the preprocessor for this target machine. */
struct base_arch_s {
struct base_arch_s
{
/* Assembler only. */
int asm_only;
......@@ -54,6 +55,10 @@ struct base_arch_s {
/* Default start of data section address for architecture. */
int default_data_section_start;
/* Offset between SFR address and RAM address:
SFR-address = RAM-address - sfr_offset */
int sfr_offset;
/* Number of 64k segments in the flash. */
int n_segments;
......
gcc/config/avr/avr.md
......@@ -28,6 +28,8 @@
;; j Branch condition.
;; k Reverse branch condition.
;;..m..Constant Direct Data memory address.
;; i Print the SFR address quivalent of a CONST_INT RAM address.
;; The resulting addres is suitable to be used in IN/OUT.
;; o Displacement for (mem (plus (reg) (const_int))) operands.
;; p POST_INC or PRE_DEC address as a pointer (X, Y, Z)
;; r POST_INC or PRE_DEC address as a register (r26, r28, r30)
......@@ -45,12 +47,12 @@
(LPM_REGNO 0) ; implicit target register of LPM
(TMP_REGNO 0) ; temporary register r0
(ZERO_REGNO 1) ; zero register r1
(SREG_ADDR 0x5F)
(SP_ADDR 0x5D)
;; Register holding the address' high part when loading via ELPM
(RAMPZ_ADDR 0x5B)
;; RAM addresses of some SFRs common to all Devices.
(SREG_ADDR 0x5F) ; Status Register
(SP_ADDR 0x5D) ; Stack Pointer
(RAMPZ_ADDR 0x5B) ; Address' high part when loading via ELPM
])
(define_c_enum "unspec"
......@@ -4658,25 +4660,25 @@
(define_insn "*cbi"
[(set (mem:QI (match_operand 0 "low_io_address_operand" "n"))
(and:QI (mem:QI (match_dup 0))
(match_operand:QI 1 "single_zero_operand" "n")))]
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
return AS2 (cbi,%m0-0x20,%2);
}
(and:QI (mem:QI (match_dup 0))
(match_operand:QI 1 "single_zero_operand" "n")))]
"optimize > 0"
{
operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
return "cbi %i0,%2";
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
(define_insn "*sbi"
[(set (mem:QI (match_operand 0 "low_io_address_operand" "n"))
(ior:QI (mem:QI (match_dup 0))
(match_operand:QI 1 "single_one_operand" "n")))]
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
return AS2 (sbi,%m0-0x20,%2);
}
(ior:QI (mem:QI (match_dup 0))
(match_operand:QI 1 "single_one_operand" "n")))]
"optimize > 0"
{
operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
return "sbi %i0,%2";
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
......@@ -5635,9 +5637,9 @@
(match_operand:QI 2 "nonmemory_operand" "L,P,r"))]
""
"@
cbi %m0-0x20,%1
sbi %m0-0x20,%1
sbrc %2,0\;sbi %m0-0x20,%1\;sbrs %2,0\;cbi %m0-0x20,%1"
cbi %i0,%1
sbi %i0,%1
sbrc %2,0\;sbi %i0,%1\;sbrs %2,0\;cbi %i0,%1"
[(set_attr "length" "1,1,4")
(set_attr "cc" "none")])
......@@ -5647,7 +5649,7 @@
(match_operand:QI 1 "const_0_to_7_operand" "n"))
(not:QI (match_operand:QI 2 "register_operand" "r")))]
""
"sbrs %2,0\;sbi %m0-0x20,%1\;sbrc %2,0\;cbi %m0-0x20,%1"
"sbrs %2,0\;sbi %i0,%1\;sbrc %2,0\;cbi %i0,%1"
[(set_attr "length" "4")
(set_attr "cc" "none")])
......
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