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lvzhengyang
riscv-gcc-1
Commits
53a83348
Commit
53a83348
authored
Sep 25, 2007
by
Michael Meissner
Committed by
Michael Meissner
Sep 25, 2007
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Fix 33524; SSE5 vectorized int->long conversions are broken
From-SVN: r128768
parent
49e39588
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4 changed files
with
43 additions
and
3 deletions
+43
-3
gcc/ChangeLog
+8
-0
gcc/config/i386/i386.c
+3
-3
gcc/testsuite/ChangeLog
+6
-0
gcc/testsuite/gcc.target/i386/sse5-convert.c
+26
-0
No files found.
gcc/ChangeLog
View file @
53a83348
2007
-
09
-
25
Michael
Meissner
<
michael
.
meissner
@
amd
.
com
>
PR
c
/
33524
*
config
/
i386
/
i386
.
c
(
ix86_expand_sse5_unpack
):
Change
to
call
gen_sse5_pperm_sign_v4si_v2di
and
gen_sse5_pperm_zero_v4si_v2di
for
vector
int32
->
int64
conversions
.
Don
't write beyond the end
of the allocated vector for int32 -> int64 conversions.
2007-09-25 Revital Eres <eres@il.ibm.com>
* config/rs6000/paired.h (paired_sel): New.
gcc/config/i386/i386.c
View file @
53a83348
...
...
@@ -13542,15 +13542,15 @@ ix86_expand_sse5_unpack (rtx operands[2], bool unsigned_p, bool high_p)
for
(
i
=
0
;
i
<
16
;
i
++
)
RTVEC_ELT
(
v
,
i
)
=
GEN_INT
(
pperm_bytes
[
i
]);
for
(
i
=
0
;
i
<
4
;
i
++
)
for
(
i
=
0
;
i
<
2
;
i
++
)
RTVEC_ELT
(
vs
,
i
)
=
GEN_INT
(
i
+
h2
);
p
=
gen_rtx_PARALLEL
(
VOIDmode
,
vs
);
x
=
force_reg
(
V16QImode
,
gen_rtx_CONST_VECTOR
(
V16QImode
,
v
));
if
(
unsigned_p
)
emit_insn
(
gen_sse5_pperm_zero_v
8hi_v4s
i
(
op0
,
op1
,
p
,
x
));
emit_insn
(
gen_sse5_pperm_zero_v
4si_v2d
i
(
op0
,
op1
,
p
,
x
));
else
emit_insn
(
gen_sse5_pperm_sign_v
8hi_v4s
i
(
op0
,
op1
,
p
,
x
));
emit_insn
(
gen_sse5_pperm_sign_v
4si_v2d
i
(
op0
,
op1
,
p
,
x
));
break
;
default
:
...
...
gcc/testsuite/ChangeLog
View file @
53a83348
2007
-
09
-
25
Michael
Meissner
<
michael
.
meissner
@amd
.
com
>
PR
c
/
33524
*
gcc
.
target
/
i386
/
sse5
-
convert
.
c
:
New
file
,
test
int
->
long
vectorized
conversions
.
2007
-
09
-
25
Revital
Eres
<
eres
@il
.
ibm
.
com
>
*
testsuite
/
gcc
.
target
/
powerpc
/
ppc
-
paired
.
c
(
paired_sel
)
:
Add
.
gcc/testsuite/gcc.target/i386/sse5-convert.c
0 → 100644
View file @
53a83348
/* Test that the compiler properly optimizes vector SI->DI conversions. This
was a bug in the initial SSE5 code. */
/* { dg-do compile { target x86_64-*-*} } */
/* { dg-options "-O2 -msse5 -ftree-vectorize" } */
/* This is PR c/33524 */
typedef
long
long
__m128i
__attribute__
((
__vector_size__
(
16
),
__may_alias__
));
#define SIZE 10240
union
{
signed
int
si
[
SIZE
];
signed
long
sl
[
SIZE
];
__m128i
align
;
}
a
,
b
;
void
conv_sign_int_sign_long
(
void
)
{
int
i
;
for
(
i
=
0
;
i
<
SIZE
;
i
++
)
a
.
sl
[
i
]
=
b
.
si
[
i
];
}
/* { dg-final { scan-assembler "pperm" } } */
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