Commit 53501a19 by Bernd Schmidt Committed by Bernd Schmidt

Prevent creation of paradoxical FLOAT_MODE subregs

From-SVN: r55064
parent 20c2d1fe
2001-06-08 Bernd Schmidt <bernds@redhat.com>
* emit-rtl.c (gen_lowpart_common): Don't create paradoxical FLOAT_MODE
subregs.
* recog.c (general_operand, register_operand): Disallow them.
2002-06-28 Neil Booth <neil@daikokuya.co.uk> 2002-06-28 Neil Booth <neil@daikokuya.co.uk>
PR preprocessor/7138 PR preprocessor/7138
......
...@@ -964,6 +964,11 @@ gen_lowpart_common (mode, x) ...@@ -964,6 +964,11 @@ gen_lowpart_common (mode, x)
> ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
return 0; return 0;
/* Don't allow generating paradoxical FLOAT_MODE subregs. */
if (GET_MODE_CLASS (mode) == MODE_FLOAT
&& GET_MODE (x) != VOIDmode && msize > xsize)
return 0;
offset = subreg_lowpart_offset (mode, GET_MODE (x)); offset = subreg_lowpart_offset (mode, GET_MODE (x));
if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
......
...@@ -958,11 +958,13 @@ general_operand (op, mode) ...@@ -958,11 +958,13 @@ general_operand (op, mode)
if (code == SUBREG) if (code == SUBREG)
{ {
rtx sub = SUBREG_REG (op);
#ifdef INSN_SCHEDULING #ifdef INSN_SCHEDULING
/* On machines that have insn scheduling, we want all memory /* On machines that have insn scheduling, we want all memory
reference to be explicit, so outlaw paradoxical SUBREGs. */ reference to be explicit, so outlaw paradoxical SUBREGs. */
if (GET_CODE (SUBREG_REG (op)) == MEM if (GET_CODE (sub) == MEM
&& GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))) && GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (sub)))
return 0; return 0;
#endif #endif
/* Avoid memories with nonzero SUBREG_BYTE, as offsetting the memory /* Avoid memories with nonzero SUBREG_BYTE, as offsetting the memory
...@@ -972,10 +974,16 @@ general_operand (op, mode) ...@@ -972,10 +974,16 @@ general_operand (op, mode)
??? This is a kludge. */ ??? This is a kludge. */
if (!reload_completed && SUBREG_BYTE (op) != 0 if (!reload_completed && SUBREG_BYTE (op) != 0
&& GET_CODE (SUBREG_REG (op)) == MEM) && GET_CODE (sub) == MEM)
return 0; return 0;
op = SUBREG_REG (op); /* FLOAT_MODE subregs can't be paradoxical. Combine will occasionally
create such rtl, and we must reject it. */
if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
&& GET_MODE_SIZE (GET_MODE (op)) > GET_MODE_SIZE (GET_MODE (sub)))
return 0;
op = sub;
code = GET_CODE (op); code = GET_CODE (op);
} }
...@@ -1048,28 +1056,36 @@ register_operand (op, mode) ...@@ -1048,28 +1056,36 @@ register_operand (op, mode)
if (GET_CODE (op) == SUBREG) if (GET_CODE (op) == SUBREG)
{ {
rtx sub = SUBREG_REG (op);
/* Before reload, we can allow (SUBREG (MEM...)) as a register operand /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
because it is guaranteed to be reloaded into one. because it is guaranteed to be reloaded into one.
Just make sure the MEM is valid in itself. Just make sure the MEM is valid in itself.
(Ideally, (SUBREG (MEM)...) should not exist after reload, (Ideally, (SUBREG (MEM)...) should not exist after reload,
but currently it does result from (SUBREG (REG)...) where the but currently it does result from (SUBREG (REG)...) where the
reg went on the stack.) */ reg went on the stack.) */
if (! reload_completed && GET_CODE (SUBREG_REG (op)) == MEM) if (! reload_completed && GET_CODE (sub) == MEM)
return general_operand (op, mode); return general_operand (op, mode);
#ifdef CLASS_CANNOT_CHANGE_MODE #ifdef CLASS_CANNOT_CHANGE_MODE
if (GET_CODE (SUBREG_REG (op)) == REG if (GET_CODE (sub) == REG
&& REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER && REGNO (sub) < FIRST_PSEUDO_REGISTER
&& (TEST_HARD_REG_BIT && (TEST_HARD_REG_BIT
(reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE], (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
REGNO (SUBREG_REG (op)))) REGNO (sub)))
&& CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (SUBREG_REG (op))) && CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (sub))
&& GET_MODE_CLASS (GET_MODE (SUBREG_REG (op))) != MODE_COMPLEX_INT && GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_INT
&& GET_MODE_CLASS (GET_MODE (SUBREG_REG (op))) != MODE_COMPLEX_FLOAT) && GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_FLOAT)
return 0; return 0;
#endif #endif
op = SUBREG_REG (op); /* FLOAT_MODE subregs can't be paradoxical. Combine will occasionally
create such rtl, and we must reject it. */
if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
&& GET_MODE_SIZE (GET_MODE (op)) > GET_MODE_SIZE (GET_MODE (sub)))
return 0;
op = sub;
} }
/* If we have an ADDRESSOF, consider it valid since it will be /* If we have an ADDRESSOF, consider it valid since it will be
......
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