[multiple changes]

Sun Feb 28 15:10:17 1999  David Edelsohn  <edelsohn@mhpcc.edu>
        * rs6000.md (elf_high, movsi_got, *movsi_got_internal,
        *movsi_got_internal_mem, GOT splitter, movdf_hardfloat32,
        movdf_softfloat32, movdf_hardfloat64, movdf_softfloat64,
        load_multiple, allocate_stack, call_indirect_aix32,
        call_indirect_aix64, call_value_indirect_aix32,
        call_value_indirect_aix64, call_indirect_nt,
        call_value_indirect_nt): Use gpc_reg_operand instead of
        register_operand.
Sun Feb 28 15:10:17 1999  Michael Meissner  <meissner@cygnus.com>
        * rs6000.md (one_cmplsi2, andsi3, iorsi3, xorsi3, *eqvsi3,
        *andcsi3, *iorcsi3, *nandsi3, *norsi3): Add alternatives to use CR
        other than cr0.
        * rs6000.c (and{,64}_operand): If the user did -ffixed-cr0, don't
        allow andi. or andis. which always set cr0.

From-SVN: r25501

gcc/ChangeLog

+Sun Feb 28 15:10:17 1999  David Edelsohn  <edelsohn@mhpcc.edu>
+
+	* rs6000.md (elf_high, movsi_got, *movsi_got_internal,
+	*movsi_got_internal_mem, GOT splitter, movdf_hardfloat32,
+	movdf_softfloat32, movdf_hardfloat64, movdf_softfloat64,
+	load_multiple, allocate_stack, call_indirect_aix32,
+	call_indirect_aix64, call_value_indirect_aix32,
+	call_value_indirect_aix64, call_indirect_nt,
+	call_value_indirect_nt): Use gpc_reg_operand instead of
+	register_operand. 
+
+Sun Feb 28 15:10:17 1999  Michael Meissner  <meissner@cygnus.com>
+
+	* rs6000.md (one_cmplsi2, andsi3, iorsi3, xorsi3, *eqvsi3,
+	*andcsi3, *iorcsi3, *nandsi3, *norsi3): Add alternatives to use CR
+	other than cr0.
+	* rs6000.c (and{,64}_operand): If the user did -ffixed-cr0, don't
+	allow andi. or andis. which always set cr0.
+
 Sun Feb 28 01:15:04 PST 1999 Jeff Law  (law@cygnus.com)
 
 	* version.c: Bump for snapshot.

gcc/config/rs6000/rs6000.c

@@ -1041,8 +1041,10 @@ and64_operand (op, mode)
     register rtx op;
     enum machine_mode mode;
 {
-  return (logical_operand (op, mode)
-	  || mask64_operand (op, mode));
+  if (fixed_regs[68])	/* CR0 not available, don't do andi./andis. */
+    return (gpc_reg_operand (op, mode) || mask64_operand (op, mode));
+
+  return (logical_operand (op, mode) || mask64_operand (op, mode));
 }
 
 /* Return 1 if the operand is either a non-special register or a
@@ -1053,8 +1055,10 @@ and_operand (op, mode)
     register rtx op;
     enum machine_mode mode;
 {
-  return (logical_operand (op, mode)
-	  || mask_operand (op, mode));
+  if (fixed_regs[68])	/* CR0 not available, don't do andi./andis. */
+    return (gpc_reg_operand (op, mode) || mask_operand (op, mode));
+
+  return (logical_operand (op, mode) || mask_operand (op, mode));
 }
 
 /* Return 1 if the operand is a general register or memory operand.  */