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lvzhengyang
riscv-gcc-1
Commits
5203427b
Commit
5203427b
authored
Mar 27, 1992
by
James Van Artsdalen
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From-SVN: r593
parent
526fef40
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gcc/config/i386/i386.md
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gcc/config/i386/i386.md
View file @
5203427b
...
@@ -999,11 +999,12 @@
...
@@ -999,11 +999,12 @@
;; part.
;; part.
(define_expand "fixuns_truncdfsi2"
(define_expand "fixuns_truncdfsi2"
[(parallel [(set (match_dup 3)
[(set (match_dup 5)
(fix:DI
(match_operand:DF 1 "register_operand" ""))
(fix:DF (match_operand:DF 1 "register_operand" ""))))
(parallel [(set (match_dup 3)
(fix:DI (fix:DF (match_dup 5))))
(clobber (match_scratch:HI 2 ""))
(clobber (match_scratch:HI 2 ""))
(clobber (match_dup
1
))])
(clobber (match_dup
5
))])
(set (match_operand:SI 0 "general_operand" "")
(set (match_operand:SI 0 "general_operand" "")
(match_dup 4))]
(match_dup 4))]
"TARGET_80387"
"TARGET_80387"
...
@@ -1011,14 +1012,16 @@
...
@@ -1011,14 +1012,16 @@
{
{
operands[3] = gen_reg_rtx (DImode);
operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_lowpart (SImode, operands[3]);
operands[4] = gen_lowpart (SImode, operands[3]);
operands[5] = gen_reg_rtx (DFmode);
}")
}")
(define_expand "fixuns_truncsfsi2"
(define_expand "fixuns_truncsfsi2"
[(parallel [(set (match_dup 3)
[(set (match_dup 5)
(fix:DI
(match_operand:SF 1 "register_operand" ""))
(fix:SF (match_operand:SF 1 "register_operand" ""))))
(parallel [(set (match_dup 3)
(fix:DI (fix:SF (match_dup 5))))
(clobber (match_scratch:HI 2 ""))
(clobber (match_scratch:HI 2 ""))
(clobber (match_dup
1
))])
(clobber (match_dup
5
))])
(set (match_operand:SI 0 "general_operand" "")
(set (match_operand:SI 0 "general_operand" "")
(match_dup 4))]
(match_dup 4))]
"TARGET_80387"
"TARGET_80387"
...
@@ -1026,32 +1029,37 @@
...
@@ -1026,32 +1029,37 @@
{
{
operands[3] = gen_reg_rtx (DImode);
operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_lowpart (SImode, operands[3]);
operands[4] = gen_lowpart (SImode, operands[3]);
operands[5] = gen_reg_rtx (SFmode);
}")
}")
;; Signed conversion to DImode.
;; Signed conversion to DImode.
(define_expand "fix_truncdfdi2"
(define_expand "fix_truncdfdi2"
[(parallel [(set (match_operand:DI 0 "general_operand" "")
[(set (match_dup 3)
(fix:DI
(match_operand:DF 1 "register_operand" ""))
(fix:DF (match_operand:DF 1 "register_operand" ""))))
(parallel [(set (match_operand:DI 0 "general_operand" "")
(fix:DI (fix:DF (match_dup 3))))
(clobber (match_scratch:HI 2 ""))
(clobber (match_scratch:HI 2 ""))
(clobber (match_dup
1
))])]
(clobber (match_dup
3
))])]
"TARGET_80387"
"TARGET_80387"
"
"
{
{
operands[1] = copy_to_mode_reg (DFmode, operands[1]);
operands[1] = copy_to_mode_reg (DFmode, operands[1]);
operands[3] = gen_reg_rtx (DFmode);
}")
}")
(define_expand "fix_truncsfdi2"
(define_expand "fix_truncsfdi2"
[(parallel [(set (match_operand:DI 0 "general_operand" "")
[(set (match_dup 3)
(fix:DI
(match_operand:SF 1 "register_operand" ""))
(fix:SF (match_operand:SF 1 "register_operand" ""))))
(parallel [(set (match_operand:DI 0 "general_operand" "")
(fix:DI (fix:SF (match_dup 3))))
(clobber (match_scratch:HI 2 ""))
(clobber (match_scratch:HI 2 ""))
(clobber (match_dup
1
))])]
(clobber (match_dup
3
))])]
"TARGET_80387"
"TARGET_80387"
"
"
{
{
operands[1] = copy_to_mode_reg (SFmode, operands[1]);
operands[1] = copy_to_mode_reg (SFmode, operands[1]);
operands[3] = gen_reg_rtx (SFmode);
}")
}")
;; These match a signed conversion of either DFmode or SFmode to DImode.
;; These match a signed conversion of either DFmode or SFmode to DImode.
...
...
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