Commit 51c6b247 by Richard Sandiford Committed by Richard Sandiford

mips.c (print_operand): Extend '%D' to memory operands.

	* config/mips/mips.c (print_operand): Extend '%D' to memory operands.
	(mips_move_2words): When splitting a move into two instructions,
	prefix the second address operand with '%D'.

From-SVN: r43964
parent 7ed47c04
2001-07-06 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.c (print_operand): Extend '%D' to memory operands.
(mips_move_2words): When splitting a move into two instructions,
prefix the second address operand with '%D'.
2001-07-12 Neil Booth <neil@daikokuya.demon.co.uk> 2001-07-12 Neil Booth <neil@daikokuya.demon.co.uk>
* Makefile.in (final.o): Depend on debug.h. * Makefile.in (final.o): Depend on debug.h.
......
...@@ -2548,12 +2548,9 @@ mips_move_2words (operands, insn) ...@@ -2548,12 +2548,9 @@ mips_move_2words (operands, insn)
} }
else if (double_memory_operand (op1, GET_MODE (op1))) else if (double_memory_operand (op1, GET_MODE (op1)))
{ ret = (reg_mentioned_p (op0, op1)
operands[2] = adjust_address (op1, SImode, 4); ? "lw\t%D0,%D1\n\tlw\t%0,%1"
ret = (reg_mentioned_p (op0, op1) : "lw\t%0,%1\n\tlw\t%D0,%D1");
? "lw\t%D0,%2\n\tlw\t%0,%1"
: "lw\t%0,%1\n\tlw\t%D0,%2");
}
if (ret != 0 && MEM_VOLATILE_P (op1)) if (ret != 0 && MEM_VOLATILE_P (op1))
{ {
...@@ -2642,10 +2639,7 @@ mips_move_2words (operands, insn) ...@@ -2642,10 +2639,7 @@ mips_move_2words (operands, insn)
} }
else if (double_memory_operand (op0, GET_MODE (op0))) else if (double_memory_operand (op0, GET_MODE (op0)))
{ ret = "sw\t%1,%0\n\tsw\t%D1,%D0";
operands[2] = adjust_address (op0, SImode, 4);
ret = "sw\t%1,%0\n\tsw\t%D1,%2";
}
} }
else if (((code1 == CONST_INT && INTVAL (op1) == 0) else if (((code1 == CONST_INT && INTVAL (op1) == 0)
...@@ -2657,10 +2651,7 @@ mips_move_2words (operands, insn) ...@@ -2657,10 +2651,7 @@ mips_move_2words (operands, insn)
if (TARGET_64BIT) if (TARGET_64BIT)
ret = "sd\t%.,%0"; ret = "sd\t%.,%0";
else else
{ ret = "sw\t%.,%0\n\tsw\t%.,%D0";
operands[2] = adjust_address (op0, SImode, 4);
ret = "sw\t%.,%0\n\tsw\t%.,%2";
}
} }
if (TARGET_STATS) if (TARGET_STATS)
...@@ -5280,7 +5271,7 @@ mips_debugger_offset (addr, offset) ...@@ -5280,7 +5271,7 @@ mips_debugger_offset (addr, offset)
'x' X is CONST_INT, prints 16 bits in hexadecimal format = "0x%04x", 'x' X is CONST_INT, prints 16 bits in hexadecimal format = "0x%04x",
'd' output integer constant in decimal, 'd' output integer constant in decimal,
'z' if the operand is 0, use $0 instead of normal operand. 'z' if the operand is 0, use $0 instead of normal operand.
'D' print second register of double-word register operand. 'D' print second part of double-word register or memory operand.
'L' print low-order register of double-word register operand. 'L' print low-order register of double-word register operand.
'M' print high-order register of double-word register operand. 'M' print high-order register of double-word register operand.
'C' print part of opcode for a branch condition. 'C' print part of opcode for a branch condition.
...@@ -5551,7 +5542,12 @@ print_operand (file, op, letter) ...@@ -5551,7 +5542,12 @@ print_operand (file, op, letter)
} }
else if (code == MEM) else if (code == MEM)
output_address (XEXP (op, 0)); {
if (letter == 'D')
output_address (plus_constant (XEXP (op, 0), 4));
else
output_address (XEXP (op, 0));
}
else if (code == CONST_DOUBLE else if (code == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT) && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT)
......
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