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Commit 517f1b34 by Uros Bizjak
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re PR target/46098 (ICE: in extract_insn, at recog.c:2100 with -msse3… 

re PR target/46098 (ICE: in extract_insn, at recog.c:2100 with -msse3 -ffloat-store and __builtin_ia32_loadupd())

	PR target/46098
	* config/i386/i386.c (ix86_expand_special_args_builtin): Always
	generate target register for "load" class builtins.

	Revert:
	2010-10-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/46098
	* config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
	Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
	(avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
	(*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
	(<sse>_movu<ssemodesuffix>): New expander.
	(*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
	(avx_movdqu<avxmodesuffix>): New expander.
	(*sse2_movdqu): Rename from sse2_movdqu.
	(sse2_movdqu): New expander.

testsuite/ChangeLog:

	* gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
	* gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.

From-SVN: r187481
parent 1c8196d9
Showing with 50 additions and 47 deletions
gcc/ChangeLog
2012-05-14 Uros Bizjak <ubizjak@gmail.com>
PR target/46098
* config/i386/i386.c (ix86_expand_special_args_builtin): Always
generate target register for "load" class builtins.
Revert:
2010-10-22 Uros Bizjak <ubizjak@gmail.com>
PR target/46098
* config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
(avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
(*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
(<sse>_movu<ssemodesuffix>): New expander.
(*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
(avx_movdqu<avxmodesuffix>): New expander.
(*sse2_movdqu): Rename from sse2_movdqu.
(sse2_movdqu): New expander.
2012-05-14 Marc Glisse <marc.glisse@inria.fr>
PR target/52607
......@@ -11,8 +31,7 @@
Jakub Jelinek <jakub@redhat.com>
PR target/53315
* config/i386/i386.md (xbegin_1): Use + in constraint and
match_dup.
* config/i386/i386.md (xbegin_1): Use + in constraint and match_dup.
(xbegin): Updated.
2012-05-14 Jakub Jelinek <jakub@redhat.com>
......@@ -250,12 +269,12 @@
* opth-gen.awk: Declare common_handle_option_auto.
* common.opt (Wuninitialized): Use EnabledBy. Delete Init.
(Wmaybe-uninitialized): Likewise.
(Wunused-but-set-variable): Likewise.
(Wunused-function): Likewise.
(Wunused-label): Likewise.
(Wunused-value): Likewise.
(Wunused-variable): Likewise.
* opt-read.awk: Create opt_numbers array.
(Wunused-but-set-variable): Likewise.
(Wunused-function): Likewise.
(Wunused-label): Likewise.
(Wunused-value): Likewise.
(Wunused-variable): Likewise.
* opt-read.awk: Create opt_numbers array.
2012-05-11 Richard Guenther <rguenther@suse.de>
......@@ -447,7 +466,7 @@
2012-05-09 Manuel López-Ibáñez <manu@gcc.gnu.org>
* doc/extend.texi (Function Attributes): Point xref to section
* doc/extend.texi (Function Attributes): Point xref to section
about Pragmas.
2012-05-09 Uros Bizjak <ubizjak@gmail.com>
......
gcc/config/i386/i386.c
......@@ -29472,8 +29472,8 @@ ix86_expand_special_args_builtin (const struct builtin_description *d,
arg_adjust = 0;
if (optimize
|| target == 0
|| GET_MODE (target) != tmode
|| !insn_p->operand[0].predicate (target, tmode))
|| !register_operand (target, tmode)
|| GET_MODE (target) != tmode)
target = gen_reg_rtx (tmode);
}
gcc/config/i386/sse.md
......@@ -588,18 +588,7 @@
DONE;
})
(define_expand "<sse>_movu<ssemodesuffix><avxsizesuffix>"
[(set (match_operand:VF 0 "nonimmediate_operand")
(unspec:VF
[(match_operand:VF 1 "nonimmediate_operand")]
UNSPEC_MOVU))]
"TARGET_SSE"
{
if (MEM_P (operands[0]) && MEM_P (operands[1]))
operands[1] = force_reg (<MODE>mode, operands[1]);
})
(define_insn "*<sse>_movu<ssemodesuffix><avxsizesuffix>"
(define_insn "<sse>_movu<ssemodesuffix><avxsizesuffix>"
[(set (match_operand:VF 0 "nonimmediate_operand" "=x,m")
(unspec:VF
[(match_operand:VF 1 "nonimmediate_operand" "xm,x")]
......@@ -631,17 +620,7 @@
]
(const_string "<MODE>")))])
(define_expand "<sse2>_movdqu<avxsizesuffix>"
[(set (match_operand:VI1 0 "nonimmediate_operand")
(unspec:VI1 [(match_operand:VI1 1 "nonimmediate_operand")]
UNSPEC_MOVU))]
"TARGET_SSE2"
{
if (MEM_P (operands[0]) && MEM_P (operands[1]))
operands[1] = force_reg (<MODE>mode, operands[1]);
})
(define_insn "*<sse2>_movdqu<avxsizesuffix>"
(define_insn "<sse2>_movdqu<avxsizesuffix>"
[(set (match_operand:VI1 0 "nonimmediate_operand" "=x,m")
(unspec:VI1 [(match_operand:VI1 1 "nonimmediate_operand" "xm,x")]
UNSPEC_MOVU))]
......
gcc/testsuite/ChangeLog
2012-05-14 Uros Bizjak <ubizjak@gmail.com>
* gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
* gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.
2012-05-14 Janne Blomqvist <jb@gcc.gnu.org>
PR fortran/52428
......
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
......@@ -14,6 +14,6 @@ avx_test (void)
c[i] = a[i] * b[i+3];
}
/* { dg-final { scan-assembler-not "\\*avx_movups256/1" } } */
/* { dg-final { scan-assembler "\\*sse_movups/1" } } */
/* { dg-final { scan-assembler-not "avx_movups256/1" } } */
/* { dg-final { scan-assembler "sse_movups/1" } } */
/* { dg-final { scan-assembler "vinsertf128" } } */
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
......@@ -24,6 +24,6 @@ avx_test (void)
}
}
/* { dg-final { scan-assembler-not "\\*avx_movdqu256/1" } } */
/* { dg-final { scan-assembler "\\*sse2_movdqu/1" } } */
/* { dg-final { scan-assembler-not "avx_movdqu256/1" } } */
/* { dg-final { scan-assembler "sse2_movdqu/1" } } */
/* { dg-final { scan-assembler "vinsert.128" } } */
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
......@@ -14,6 +14,6 @@ avx_test (void)
c[i] = a[i] * b[i+3];
}
/* { dg-final { scan-assembler-not "\\*avx_movupd256/1" } } */
/* { dg-final { scan-assembler "\\*sse2_movupd/1" } } */
/* { dg-final { scan-assembler-not "avx_movupd256/1" } } */
/* { dg-final { scan-assembler "sse2_movupd/1" } } */
/* { dg-final { scan-assembler "vinsertf128" } } */
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
......@@ -14,6 +14,6 @@ avx_test (void)
b[i] = a[i+3] * 2;
}
/* { dg-final { scan-assembler "\\*avx_movups256/1" } } */
/* { dg-final { scan-assembler-not "\\*avx_movups/1" } } */
/* { dg-final { scan-assembler "avx_movups256/1" } } */
/* { dg-final { scan-assembler-not "avx_movups/1" } } */
/* { dg-final { scan-assembler-not "vinsertf128" } } */
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
......@@ -17,6 +17,6 @@ avx_test (void)
d[i] = c[i] * 20.0;
}
/* { dg-final { scan-assembler-not "\\*avx_movups256/2" } } */
/* { dg-final { scan-assembler-not "avx_movups256/2" } } */
/* { dg-final { scan-assembler "vmovups.*\\*movv4sf_internal/3" } } */
/* { dg-final { scan-assembler "vextractf128" } } */
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
......@@ -24,6 +24,6 @@ avx_test (void)
}
}
/* { dg-final { scan-assembler-not "\\*avx_movdqu256/2" } } */
/* { dg-final { scan-assembler-not "avx_movdqu256/2" } } */
/* { dg-final { scan-assembler "vmovdqu.*\\*movv16qi_internal/3" } } */
/* { dg-final { scan-assembler "vextract.128" } } */
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
......@@ -17,6 +17,6 @@ avx_test (void)
d[i] = c[i] * 20.0;
}
/* { dg-final { scan-assembler-not "\\*avx_movupd256/2" } } */
/* { dg-final { scan-assembler-not "avx_movupd256/2" } } */
/* { dg-final { scan-assembler "vmovupd.*\\*movv2df_internal/3" } } */
/* { dg-final { scan-assembler "vextractf128" } } */
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
......@@ -14,7 +14,7 @@ avx_test (void)
b[i+3] = a[i] * c[i];
}
/* { dg-final { scan-assembler "\\*avx_movups256/2" } } */
/* { dg-final { scan-assembler-not "\\*avx_movups/2" } } */
/* { dg-final { scan-assembler "avx_movups256/2" } } */
/* { dg-final { scan-assembler-not "avx_movups/2" } } */
/* { dg-final { scan-assembler-not "\\*avx_movv4sf_internal/3" } } */
/* { dg-final { scan-assembler-not "vextractf128" } } */
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