Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
517b3f9f
Commit
517b3f9f
authored
Feb 08, 2004
by
Eric Botcazou
Committed by
Eric Botcazou
Feb 08, 2004
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
* g++.dg/eh/simd-2.C: Adjust line numbers for SPARC.
From-SVN: r77495
parent
c3862806
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
7 additions
and
1 deletions
+7
-1
gcc/testsuite/ChangeLog
+5
-0
gcc/testsuite/g++.dg/eh/simd-2.C
+2
-1
No files found.
gcc/testsuite/ChangeLog
View file @
517b3f9f
2004-02-08 Eric Botcazou <ebotcazou@libertysurf.fr>
* g++.dg/eh/simd-2.C: Adjust line numbers for SPARC.
2004-02-08 Eric Botcazou <ebotcazou@libertysurf.fr>
* gcc.c-torture/execute/va-arg-25.x: XFAIL only on SPARC 64-bit.
2004-02-07 Zack Weinberg <zack@codesourcery.com>
...
...
@@ -20707,3 +20711,4 @@ rlsruhe.de>
correspond to c-torture 1.11.
* New file.
gcc/testsuite/g++.dg/eh/simd-2.C
View file @
517b3f9f
...
...
@@ -3,7 +3,8 @@
// { dg-options "-O" }
// { dg-options "-O -w" { target i?86-*-* } }
// { dg-do run }
// { dg-error "" "PR target/12916" { target sparc*-*-* } 11 }
// { dg-error "" "PR target/12916" { target sparc64-*-* sparcv9-*-* } 12 }
// { dg-error "" "PR target/12916" { target sparc-*-* } 14 }
typedef
int
__attribute__
((
mode
(
V4SI
)))
vecint
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment