[PATCH, GCC, AARCH64] Add support for +profile extension

This patch adds support for the Statistical Profiling Extension (SPE) on
AArch64. Even though the compiler will not generate code any differently
given this extension, it will need to pass it on to the assembler in
order to let it correctly assemble inline asm containing accesses to the
extension's system registers.  The same applies when using the
preprocessor on an assembly file as this first must pass through cc1.

I left the hwcaps string for SPE empty as the kernel does not define a
feature string for this extension.  The current effect of this is that
driver will disable profile feature bit in GCC.  This is OK though
because we don't, nor do we ever, enable this feature bit, as codegen is
not affect by the SPE support and more importantly the driver will still
pass the extension down to the assembler regardless.

gcc/ChangeLog
2018-07-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/aarch64/aarch64-option-extensions.def: New entry for profile
	extension.
	* config/aarch64/aarch64.h (AARCH64_FL_PROFILE): New.
	* doc/invoke.texi (aarch64-feature-modifiers): New entry for profile
	extension.

gcc/testsuite/ChangeLog
2018-07-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* gcc.target/aarch64/profile.c: New test.

From-SVN: r262882

gcc/ChangeLog

 2018-07-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
+	* config/aarch64/aarch64-option-extensions.def: New entry for profile
+	extension.
+	* config/aarch64/aarch64.h (AARCH64_FL_PROFILE): New.
+	* doc/invoke.texi (aarch64-feature-modifiers): New entry for profile
+	extension.
+
+2018-07-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
 	PR target/83009
 	* config/aarch64/predicates.md (aarch64_mem_pair_lanes_operand): Make
 	address check not strict.

gcc/config/aarch64/aarch64-option-extensions.def

@@ -105,4 +105,7 @@ AARCH64_OPT_EXTENSION("fp16fml", AARCH64_FL_F16FML, AARCH64_FL_FP | AARCH64_FL_F
    Disabling "sve" just disables "sve".  */
 AARCH64_OPT_EXTENSION("sve", AARCH64_FL_SVE, AARCH64_FL_FP | AARCH64_FL_SIMD | AARCH64_FL_F16, 0, "sve")
 
+/* Enabling/Disabling "profile" does not enable/disable any other feature.  */
+AARCH64_OPT_EXTENSION("profile", AARCH64_FL_PROFILE, 0, 0, "")
+
 #undef AARCH64_OPT_EXTENSION

gcc/config/aarch64/aarch64.h

@@ -158,6 +158,9 @@ extern unsigned aarch64_architecture_version;
 #define AARCH64_FL_SHA3	      (1 << 18)  /* Has ARMv8.4-a SHA3 and SHA512.  */
 #define AARCH64_FL_F16FML     (1 << 19)  /* Has ARMv8.4-a FP16 extensions.  */
 
+/* Statistical Profiling extensions.  */
+#define AARCH64_FL_PROFILE    (1 << 20)
+
 /* Has FP and SIMD.  */
 #define AARCH64_FL_FPSIMD     (AARCH64_FL_FP | AARCH64_FL_SIMD)
 

gcc/doc/invoke.texi

@@ -14845,6 +14845,9 @@ instructions. Use of this option with architectures prior to Armv8.2-A is not su
 @item sm4
 Enable the sm3 and sm4 crypto extension.  This also enables Advanced SIMD instructions.
 Use of this option with architectures prior to Armv8.2-A is not supported.
+@item profile
+Enable the Statistical Profiling extension.  This option is only to enable the
+extension at the assembler level and does not affect code generation.
 
 @end table
 

gcc/testsuite/ChangeLog

 2018-07-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
+	* gcc.target/aarch64/profile.c: New test.
+
+2018-07-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
 	PR target/83009
 	* gcc/target/aarch64/store_v2vec_lanes.c: Add extra tests.
 

gcc/testsuite/gcc.target/aarch64/profile.c

+/* { dg-do compile } */
+/* { dg-options "-march=armv8.2-a+profile" } */
+/* { dg-final { scan-assembler "\\.arch armv8.2-a\[\^\n\]*\\+profile\[\^\n\]*\n" } } */