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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
5107b750
Commit
5107b750
authored
Sep 10, 1996
by
Jim Wilson
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(mips_move_2words): Rewrite 32 bit shifts as 16 bit shifts.
From-SVN: r12696
parent
24f72d76
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gcc/config/mips/mips.c
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gcc/config/mips/mips.c
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5107b750
...
...
@@ -1539,8 +1539,10 @@ mips_move_2words (operands, insn)
}
else
{
operands
[
2
]
=
GEN_INT
(
INTVAL
(
operands
[
1
])
>>
32
);
operands
[
1
]
=
GEN_INT
(
INTVAL
(
operands
[
1
])
<<
32
>>
32
);
/* We use multiple shifts here, to avoid warnings about out
of range shifts on 32 bit hosts. */
operands
[
2
]
=
GEN_INT
(
INTVAL
(
operands
[
1
])
>>
16
>>
16
);
operands
[
1
]
=
GEN_INT
(
INTVAL
(
operands
[
1
])
<<
16
<<
16
>>
16
>>
16
);
ret
=
"li
\t
%M0,%2
\n\t
li
\t
%L0,%1"
;
}
}
...
...
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