Commit 50fed7bf by Ramana Radhakrishnan

Fix generation of vorn and vbic for Neon.

From-SVN: r174266
parent 48df3fa6
2011-05-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* config/arm/neon.md ("orn<mode>3_neon"): Canonicalize not.
("orndi3_neon"): Likewise.
("bic<mode>3_neon"): Likewise.
2011-05-26 Ira Rosen <ira.rosen@linaro.org> 2011-05-26 Ira Rosen <ira.rosen@linaro.org>
PR tree-optimization/49038 PR tree-optimization/49038
...@@ -185,6 +191,7 @@ ...@@ -185,6 +191,7 @@
* ipa.c (function_and_variable_visibility): Only add to same * ipa.c (function_and_variable_visibility): Only add to same
comdat group list if DECL_ONE_ONLY. comdat group list if DECL_ONE_ONLY.
>>>>>>> .r174265
2011-05-25 Andrey Belevantsev <abel@ispras.ru> 2011-05-25 Andrey Belevantsev <abel@ispras.ru>
PR rtl-optimization/49014 PR rtl-optimization/49014
......
...@@ -794,8 +794,8 @@ ...@@ -794,8 +794,8 @@
(define_insn "orn<mode>3_neon" (define_insn "orn<mode>3_neon"
[(set (match_operand:VDQ 0 "s_register_operand" "=w") [(set (match_operand:VDQ 0 "s_register_operand" "=w")
(ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w") (ior:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
(not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))] (match_operand:VDQ 1 "s_register_operand" "w")))]
"TARGET_NEON" "TARGET_NEON"
"vorn\t%<V_reg>0, %<V_reg>1, %<V_reg>2" "vorn\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "neon_type" "neon_int_1")] [(set_attr "neon_type" "neon_int_1")]
...@@ -803,8 +803,8 @@ ...@@ -803,8 +803,8 @@
(define_insn "orndi3_neon" (define_insn "orndi3_neon"
[(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r") [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r")
(ior:DI (match_operand:DI 1 "s_register_operand" "w,r,0") (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))
(not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))))] (match_operand:DI 1 "s_register_operand" "w,r,0")))]
"TARGET_NEON" "TARGET_NEON"
"@ "@
vorn\t%P0, %P1, %P2 vorn\t%P0, %P1, %P2
...@@ -816,8 +816,8 @@ ...@@ -816,8 +816,8 @@
(define_insn "bic<mode>3_neon" (define_insn "bic<mode>3_neon"
[(set (match_operand:VDQ 0 "s_register_operand" "=w") [(set (match_operand:VDQ 0 "s_register_operand" "=w")
(and:VDQ (match_operand:VDQ 1 "s_register_operand" "w") (and:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
(not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))] (match_operand:VDQ 1 "s_register_operand" "w")))]
"TARGET_NEON" "TARGET_NEON"
"vbic\t%<V_reg>0, %<V_reg>1, %<V_reg>2" "vbic\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "neon_type" "neon_int_1")] [(set_attr "neon_type" "neon_int_1")]
......
2011-05-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* gcc.target/arm/neon-vorn-vbic.c: New test.
2011-05-26 Ira Rosen <ira.rosen@linaro.org> 2011-05-26 Ira Rosen <ira.rosen@linaro.org>
PR tree-optimization/49038 PR tree-optimization/49038
......
/* { dg-do compile } */
/* { dg-require-effective-target arm_neon_ok } */
/* { dg-options "-O2 -ftree-vectorize" } */
/* { dg-add-options arm_neon } */
void bor (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
{
int i;
for (i = 0; i < 9; i++)
c[i] = b[i] | (~a[i]);
}
void bic (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
{
int i;
for (i = 0; i < 9; i++)
c[i] = b[i] & (~a[i]);
}
/* { dg-final { scan-assembler "vorn\\t" } } */
/* { dg-final { scan-assembler "vbic\\t" } } */
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