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riscv-gcc-1
Commit 50961141 by Richard Henderson Committed by Richard Henderson
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constraints.md (Y2): Rename from Y. 

        * config/i386/constraints.md (Y2): Rename from Y.
        (Yi): New constraint. 
        * config/i386/i386.md (movsi_1, movdi_2, pushdf_nointeger,
        pushdf_integer, movdf_nointeger, movdf_integer, zero_extendsidi2_32,
        zero_extendsidi2_rex64, truncxfdf2_mixed): Change Y constraints to Y2.
        (extendsfdf2_mixed, extendsfdf2_sse, truncdfsf_fast_mixed,
        truncdfsf_fast_sse, truncdfsf_mixed, fix_truncdfdi_sse,
        fix_truncdfsi_sse, floatsidf2_mixed, floatsidf2_sse,
        floatdidf2_mixed, floatdidf2_sse, absnegdf2_mixed,
        absnegdf2_sse, sse_setccdf, fop_df_comm_mixed, fop_df_comm_sse,
        fop_df_1_mixed, fop_df_1_sse): Change Y constraints to x.
        * config/i386/mmx.md (mov<MMXMODEI>_internal_rex64,
        mov<MMXMODEI>_internal, movv2sf_internal_rex64, movv2sf_internal,
        vec_extractv2si_1): Change Y constraints to Y2.
        * config/i386/sse.md (vec_setv4sf_0, vec_concatv2df, vec_dupv4si,
        vec_dupv2di, sse2_concatv2si, vec_concatv4si_1, vec_concatv2di):
        Change Y constraints to Y2.
        (sse2_loadld): Change Y constraints to x.

From-SVN: r121660
parent 6728236f
Showing with 61 additions and 32 deletions
gcc/ChangeLog
2007-02-06 Richard Henderson <rth@redhat.com>
* config/i386/constraints.md (Y2): Rename from Y.
(Yi): New constraint.
* config/i386/i386.md (movsi_1, movdi_2, pushdf_nointeger,
pushdf_integer, movdf_nointeger, movdf_integer, zero_extendsidi2_32,
zero_extendsidi2_rex64, truncxfdf2_mixed): Change Y constraints to Y2.
(extendsfdf2_mixed, extendsfdf2_sse, truncdfsf_fast_mixed,
truncdfsf_fast_sse, truncdfsf_mixed, fix_truncdfdi_sse,
fix_truncdfsi_sse, floatsidf2_mixed, floatsidf2_sse,
floatdidf2_mixed, floatdidf2_sse, absnegdf2_mixed,
absnegdf2_sse, sse_setccdf, fop_df_comm_mixed, fop_df_comm_sse,
fop_df_1_mixed, fop_df_1_sse): Change Y constraints to x.
* config/i386/mmx.md (mov<MMXMODEI>_internal_rex64,
mov<MMXMODEI>_internal, movv2sf_internal_rex64, movv2sf_internal,
vec_extractv2si_1): Change Y constraints to Y2.
* config/i386/sse.md (vec_setv4sf_0, vec_concatv2df, vec_dupv4si,
vec_dupv2di, sse2_concatv2si, vec_concatv4si_1, vec_concatv2di):
Change Y constraints to Y2.
(sse2_loadld): Change Y constraints to x.
2007-02-06 Roger Sayle <roger@eyesopen.com>
* config/rs6000/rs6000.md (popcount<mode>2): Rewrite.
......
gcc/config/i386/constraints.md
......@@ -83,8 +83,16 @@
(define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
"Any SSE register.")
(define_register_constraint "Y" "TARGET_SSE2? SSE_REGS : NO_REGS"
"@internal Any SSE2 register.")
;; We use the Y prefix to denote any number of conditional register sets:
;; 2 SSE2 enabled
;; i SSE2 inter-unit moves enabled
(define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
"@internal Any SSE register, when SSE2 is enabled.")
(define_register_constraint "Yi"
"TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS"
"@internal Any SSE register, when SSE2 and inter-unit moves are enabled.")
;; Integer constant constraints.
(define_constraint "I"
......
gcc/config/i386/mmx.md
......@@ -64,9 +64,9 @@
(define_insn "*mov<mode>_internal_rex64"
[(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
"=rm,r,*y,*y ,m ,*y,Y ,x,x ,m,r,x")
"=rm,r,*y,*y ,m ,*y,Y2,x,x ,m,r,x")
(match_operand:MMXMODEI 1 "vector_move_operand"
"Cr ,m,C ,*ym,*y,Y ,*y,C,xm,x,x,r"))]
"Cr ,m,C ,*ym,*y,Y2,*y,C,xm,x,x,r"))]
"TARGET_64BIT && TARGET_MMX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
......@@ -88,9 +88,9 @@
(define_insn "*mov<mode>_internal"
[(set (match_operand:MMXMODEI 0 "nonimmediate_operand"
"=*y,*y ,m ,*y,*Y,*Y,*Y ,m ,*x,*x,*x,m ,?r ,?m")
"=*y,*y ,m ,*y ,*Y2,*Y2,*Y2 ,m ,*x,*x,*x,m ,?r ,?m")
(match_operand:MMXMODEI 1 "vector_move_operand"
"C ,*ym,*y,*Y,*y,C ,*Ym,*Y,C ,*x,m ,*x,irm,r"))]
"C ,*ym,*y,*Y2,*y ,C ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))]
"TARGET_MMX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
......@@ -123,9 +123,9 @@
(define_insn "*movv2sf_internal_rex64"
[(set (match_operand:V2SF 0 "nonimmediate_operand"
"=rm,r,*y ,*y ,m ,*y,Y ,x,x,x,m,r,x")
"=rm,r,*y ,*y ,m ,*y,Y2,x,x,x,m,r,x")
(match_operand:V2SF 1 "vector_move_operand"
"Cr ,m ,C ,*ym,*y,Y ,*y,C,x,m,x,x,r"))]
"Cr ,m ,C ,*ym,*y,Y2,*y,C,x,m,x,x,r"))]
"TARGET_64BIT && TARGET_MMX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
......@@ -148,9 +148,9 @@
(define_insn "*movv2sf_internal"
[(set (match_operand:V2SF 0 "nonimmediate_operand"
"=*y,*y ,m,*y,*Y,*x,*x,*x,m ,?r ,?m")
"=*y,*y ,m,*y ,*Y2,*x,*x,*x,m ,?r ,?m")
(match_operand:V2SF 1 "vector_move_operand"
"C ,*ym,*y,*Y,*y,C ,*x,m ,*x,irm,r"))]
"C ,*ym,*y,*Y2,*y ,C ,*x,m ,*x,irm,r"))]
"TARGET_MMX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
......@@ -1172,9 +1172,9 @@
})
(define_insn "*vec_extractv2si_1"
[(set (match_operand:SI 0 "nonimmediate_operand" "=y,Y,Y,x,frxy")
[(set (match_operand:SI 0 "nonimmediate_operand" "=y,Y2,Y2,x,frxy")
(vec_select:SI
(match_operand:V2SI 1 "nonimmediate_operand" " 0,0,Y,0,o")
(match_operand:V2SI 1 "nonimmediate_operand" " 0,0 ,Y2,0,o")
(parallel [(const_int 1)])))]
"TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
......
gcc/config/i386/sse.md
......@@ -1327,7 +1327,7 @@
})
(define_insn "*vec_setv4sf_0"
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,Y ,m")
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,Y2,m")
(vec_merge:V4SF
(vec_duplicate:V4SF
(match_operand:SF 2 "general_operand" " x,m,*r,x*rfF"))
......@@ -2445,10 +2445,10 @@
(set_attr "mode" "DF")])
(define_insn "*vec_concatv2df"
[(set (match_operand:V2DF 0 "register_operand" "=Y,Y,Y,x,x")
[(set (match_operand:V2DF 0 "register_operand" "=Y2,Y2,Y2,x,x")
(vec_concat:V2DF
(match_operand:DF 1 "nonimmediate_operand" " 0,0,m,0,0")
(match_operand:DF 2 "vector_move_operand" " Y,m,C,x,m")))]
(match_operand:DF 1 "nonimmediate_operand" " 0 ,0 ,m ,0,0")
(match_operand:DF 2 "vector_move_operand" " Y2,m ,C ,x,m")))]
"TARGET_SSE"
"@
unpcklpd\t{%2, %0|%0, %2}
......@@ -3961,11 +3961,11 @@
"operands[2] = CONST0_RTX (V4SImode);")
(define_insn "sse2_loadld"
[(set (match_operand:V4SI 0 "register_operand" "=Y,x,x")
[(set (match_operand:V4SI 0 "register_operand" "=Y2,x,x")
(vec_merge:V4SI
(vec_duplicate:V4SI
(match_operand:SI 2 "nonimmediate_operand" "mr,m,x"))
(match_operand:V4SI 1 "reg_or_0_operand" " C,C,0")
(match_operand:SI 2 "nonimmediate_operand" "mr ,m,x"))
(match_operand:V4SI 1 "reg_or_0_operand" " C ,C,0")
(const_int 1)))]
"TARGET_SSE"
"@
......@@ -4048,9 +4048,9 @@
(set_attr "mode" "V2SF,V4SF,V2SF")])
(define_insn "*vec_dupv4si"
[(set (match_operand:V4SI 0 "register_operand" "=Y,x")
[(set (match_operand:V4SI 0 "register_operand" "=Y2,x")
(vec_duplicate:V4SI
(match_operand:SI 1 "register_operand" " Y,0")))]
(match_operand:SI 1 "register_operand" " Y2,0")))]
"TARGET_SSE"
"@
pshufd\t{$0, %1, %0|%0, %1, 0}
......@@ -4059,9 +4059,9 @@
(set_attr "mode" "TI,V4SF")])
(define_insn "*vec_dupv2di"
[(set (match_operand:V2DI 0 "register_operand" "=Y,x")
[(set (match_operand:V2DI 0 "register_operand" "=Y2,x")
(vec_duplicate:V2DI
(match_operand:DI 1 "register_operand" " 0,0")))]
(match_operand:DI 1 "register_operand" " 0 ,0")))]
"TARGET_SSE"
"@
punpcklqdq\t%0, %0
......@@ -4073,10 +4073,10 @@
;; nonimmediate_operand for operand 2 and *not* allowing memory for the SSE
;; alternatives pretty much forces the MMX alternative to be chosen.
(define_insn "*sse2_concatv2si"
[(set (match_operand:V2SI 0 "register_operand" "=Y, Y,*y,*y")
[(set (match_operand:V2SI 0 "register_operand" "=Y2, Y2,*y,*y")
(vec_concat:V2SI
(match_operand:SI 1 "nonimmediate_operand" " 0,rm, 0,rm")
(match_operand:SI 2 "reg_or_0_operand" " Y, C,*y, C")))]
(match_operand:SI 1 "nonimmediate_operand" " 0 ,rm , 0,rm")
(match_operand:SI 2 "reg_or_0_operand" " Y2,C ,*y, C")))]
"TARGET_SSE2"
"@
punpckldq\t{%2, %0|%0, %2}
......@@ -4101,10 +4101,10 @@
(set_attr "mode" "V4SF,V4SF,DI,DI")])
(define_insn "*vec_concatv4si_1"
[(set (match_operand:V4SI 0 "register_operand" "=Y,x,x")
[(set (match_operand:V4SI 0 "register_operand" "=Y2,x,x")
(vec_concat:V4SI
(match_operand:V2SI 1 "register_operand" " 0,0,0")
(match_operand:V2SI 2 "nonimmediate_operand" " Y,x,m")))]
(match_operand:V2SI 1 "register_operand" " 0 ,0,0")
(match_operand:V2SI 2 "nonimmediate_operand" " Y2,x,m")))]
"TARGET_SSE"
"@
punpcklqdq\t{%2, %0|%0, %2}
......@@ -4114,10 +4114,10 @@
(set_attr "mode" "TI,V4SF,V2SF")])
(define_insn "*vec_concatv2di"
[(set (match_operand:V2DI 0 "register_operand" "=Y,?Y,Y,x,x,x")
[(set (match_operand:V2DI 0 "register_operand" "=Y2,?Y2,Y2,x,x,x")
(vec_concat:V2DI
(match_operand:DI 1 "nonimmediate_operand" " m,*y,0,0,0,m")
(match_operand:DI 2 "vector_move_operand" " C, C,Y,x,m,0")))]
(match_operand:DI 1 "nonimmediate_operand" " m,*y ,0 ,0,0,m")
(match_operand:DI 2 "vector_move_operand" " C, C,Y2,x,m,0")))]
"TARGET_SSE"
"@
movq\t{%1, %0|%0, %1}
......
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