Skip to content

R
riscv-gcc-1
Commit 5071eab7 by Uros Bizjak
Options

i386.md (fix_trunc<mode>_fisttp_i387_1): Use can_create_pseudo_p. 

	* config/i386/i386.md (fix_trunc<mode>_fisttp_i387_1): Use
	can_create_pseudo_p.
	(*fix_trunc<mode>_i387_1): Ditto.
	(*floathi<mode>2_1): Ditto.
	(*float<SSEMODEI24:mode><X87MODEF:mode>2_1): Ditto.
	(*fistdi2_1): Ditto.
	(*fist<mode>2_1): Ditto.
	(frndintxf2_floor): Ditto.
	(*fist<mode>2_floor_1): Ditto.
	(frndintxf2_ceil): Ditto.
	(*fist<mode>2_ceil_1): Ditto.
	(frndintxf2_trunc): Ditto.
	(frndintxf2_mask_pm): Ditto.
	(fxam<mode>2_i387_with_temp): Ditto.
	* config/i386/sse.md (mulv16qi3): Ditto.
	(*sse2_mulv4si3): Ditto.
	(mulv2di3): Ditto.
	(sse4_2_pcmpestr): Ditto.
	(sse4_2_pcmpistr): Ditto.

From-SVN: r149205
parent f0e410bc
Showing with 52 additions and 31 deletions
gcc/ChangeLog
2009-07-03 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (fix_trunc<mode>_fisttp_i387_1): Use
can_create_pseudo_p.
(*fix_trunc<mode>_i387_1): Ditto.
(*floathi<mode>2_1): Ditto.
(*float<SSEMODEI24:mode><X87MODEF:mode>2_1): Ditto.
(*fistdi2_1): Ditto.
(*fist<mode>2_1): Ditto.
(frndintxf2_floor): Ditto.
(*fist<mode>2_floor_1): Ditto.
(frndintxf2_ceil): Ditto.
(*fist<mode>2_ceil_1): Ditto.
(frndintxf2_trunc): Ditto.
(frndintxf2_mask_pm): Ditto.
(fxam<mode>2_i387_with_temp): Ditto.
* config/i386/sse.md (mulv16qi3): Ditto.
(*sse2_mulv4si3): Ditto.
(mulv2di3): Ditto.
(sse4_2_pcmpestr): Ditto.
(sse4_2_pcmpistr): Ditto.
2009-07-03 Jan Hubicka <jh@suse.cz>
* tree-ssa-dce.c (bb_contains_live_stmts): New bitmap.
......@@ -48,8 +70,7 @@
* config/mep/mep.c (mep_handle_option): Leave IVC2 control
registers as fixed.
(mep_interrupt_saved_reg): Save appropriate IVC2 control
registers.
(mep_interrupt_saved_reg): Save appropriate IVC2 control registers.
* config/mep/mep-ivc2.cpu: Add VOLATILE to insns that make
unspecified accesses to control registers.
* config/mep/intrinsics.md: Regenerate.
......@@ -100,7 +121,8 @@
2009-07-01 DJ Delorie <dj@redhat.com>
* config/mep/mep-ivc2.cpu (cmov, cmovc, cmovh): Add intrinsic names to VLIW variants.
* config/mep/mep-ivc2.cpu (cmov, cmovc, cmovh): Add intrinsic
names to VLIW variants.
(ivc2rm, ivc2crn): Make data type consistent with non-VLIW variants.
* config/mep/intrinsics.md: Regenerate.
* config/mep/intrinsics.h: Regenerate.
......@@ -119,8 +141,8 @@
of the jump table.
(casesi64p): Likewise.
* pa.c (forward_branch_p): Return bool type. Use instruction addresses
when available. Assert that INSN has a jump label.
* pa.c (forward_branch_p): Return bool type. Use instruction
addresses when available. Assert that INSN has a jump label.
(pa_adjust_insn_length): Don't call forward_branch_p if INSN doesn't
have a jump label.
......@@ -128,8 +150,7 @@
PR tree-optimization/19831
* tree-ssa-dce.c (propagate_necessity): Calls to functions
that only act as barriers do not make any previous stores
necessary.
that only act as barriers do not make any previous stores necessary.
* tree-ssa-structalias.c (handle_lhs_call): Delay making
HEAP variables global, do not add a constraint from nonlocal.
(find_func_aliases): Handle escapes through return statements.
......@@ -422,7 +443,7 @@
* config/xtensa/xtensa-protos.h (xtensa_frame_pointer_required):
Remove.
2009-06-29 Olatunji Ruwase <tjruwase@google.com>
2009-06-29 Olatunji Ruwase <tjruwase@google.com>
* doc/plugins.texi: Document PLUGIN_START_UNIT.
* toplev.c (compile_file): Call PLUGIN_START_UNIT.
......
gcc/config/i386/i386.c
......@@ -12760,7 +12760,7 @@ ix86_expand_move (enum machine_mode mode, rtx operands[])
op1 = force_reg (Pmode, op1);
else if (!TARGET_64BIT || !x86_64_movabs_operand (op1, Pmode))
{
rtx reg = !can_create_pseudo_p () ? op0 : NULL_RTX;
rtx reg = can_create_pseudo_p () ? NULL_RTX : op0;
op1 = legitimize_pic_address (op1, reg);
if (op0 == op1)
return;
......
gcc/config/i386/i386.md
......@@ -5122,7 +5122,7 @@
&& !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
&& (TARGET_64BIT || <MODE>mode != DImode))
&& TARGET_SSE_MATH)
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -5202,7 +5202,7 @@
&& !TARGET_FISTTP
&& !(SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
&& (TARGET_64BIT || <MODE>mode != DImode))
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -5377,7 +5377,7 @@
"TARGET_80387
&& (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
|| TARGET_MIX_SSE_I387)
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(parallel [(set (match_dup 0)
......@@ -5472,7 +5472,7 @@
&& flag_trapping_math)
|| !(TARGET_INTER_UNIT_CONVERSIONS
|| optimize_function_for_size_p (cfun)))))
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(parallel [(set (match_dup 0) (float:X87MODEF (match_dup 1)))
......@@ -16670,7 +16670,7 @@
(clobber (reg:CC FLAGS_REG))])]
"!TARGET_64BIT && TARGET_GNU2_TLS"
{
operands[3] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
operands[3] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0];
ix86_tls_descriptor_calls_expanded_in_cfun = true;
})
......@@ -16719,7 +16719,7 @@
""
[(set (match_dup 0) (match_dup 5))]
{
operands[5] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
operands[5] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0];
emit_insn (gen_tls_dynamic_gnu2_32 (operands[5], operands[1], operands[2]));
})
......@@ -16734,7 +16734,7 @@
(clobber (reg:CC FLAGS_REG))])]
"TARGET_64BIT && TARGET_GNU2_TLS"
{
operands[2] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
operands[2] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0];
ix86_tls_descriptor_calls_expanded_in_cfun = true;
})
......@@ -16778,7 +16778,7 @@
""
[(set (match_dup 0) (match_dup 4))]
{
operands[4] = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (Pmode);
operands[4] = can_create_pseudo_p () ? gen_reg_rtx (Pmode) : operands[0];
emit_insn (gen_tls_dynamic_gnu2_64 (operands[4], operands[1]));
})
......@@ -18563,7 +18563,7 @@
(unspec:DI [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -18630,7 +18630,7 @@
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -18717,7 +18717,7 @@
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -18808,7 +18808,7 @@
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -18991,7 +18991,7 @@
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -19082,7 +19082,7 @@
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -19261,7 +19261,7 @@
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -19353,7 +19353,7 @@
(clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -19431,7 +19431,7 @@
[(match_operand:MODEF 1 "memory_operand" "")]
UNSPEC_FXAM_MEM))]
"TARGET_USE_FANCY_MATH_387
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(set (match_dup 2)(match_dup 1))
......
gcc/config/i386/sse.md
......@@ -4760,7 +4760,7 @@
(mult:V16QI (match_operand:V16QI 1 "register_operand" "")
(match_operand:V16QI 2 "register_operand" "")))]
"TARGET_SSE2
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -5218,7 +5218,7 @@
(mult:V4SI (match_operand:V4SI 1 "register_operand" "")
(match_operand:V4SI 2 "register_operand" "")))]
"TARGET_SSE2 && !TARGET_SSE4_1 && !TARGET_SSE5
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -5271,7 +5271,7 @@
(mult:V2DI (match_operand:V2DI 1 "register_operand" "")
(match_operand:V2DI 2 "register_operand" "")))]
"TARGET_SSE2
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -9842,7 +9842,7 @@
(match_dup 6)]
UNSPEC_PCMPESTR))]
"TARGET_SSE4_2
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......@@ -9972,7 +9972,7 @@
(match_dup 4)]
UNSPEC_PCMPISTR))]
"TARGET_SSE4_2
&& !(reload_completed || reload_in_progress)"
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)]
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment