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riscv-gcc-1
Commit 4e938ce6 by Uros Bizjak
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mmx.md (*mov<mode>_internal_rex64): Use %vmovq for reg<->xmm moves. 

	* config/i386/mmx.md (*mov<mode>_internal_rex64): Use %vmovq for
	reg<->xmm moves.
	(*mov<mode>_internal): Merge with *mov<mode>_internal_avx.
	(*movv2sf_internal_rex64): Use %vmovq for reg<->xmm moves.  Merge
	with *movv2sf_internal_rex64_avx.
	(*movv2sf_internal): Merge with *movv2sf_internal_avx.
	* config/i386/i386.md (*movdi_internal_rex64) <TYPE_SSEMOV>:
	Use %v prefix in insn mnemonic to handle TARGET_AVX.
	(*movdi_internal): Add "isa" attribute.  Use "maybe_vex" instead of
	"vex" in "prefix" attribute calculation.
	(*movdf_internal): Output AVX mnemonics.  Add "prefix" attribute.

From-SVN: r173265
parent 9257f35f
Showing with 124 additions and 139 deletions
gcc/ChangeLog
2011-05-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/mmx.md (*mov<mode>_internal_rex64): Use %vmovq for
reg<->xmm moves.
(*mov<mode>_internal): Merge with *mov<mode>_internal_avx.
(*movv2sf_internal_rex64): Use %vmovq for reg<->xmm moves. Merge
with *movv2sf_internal_rex64_avx.
(*movv2sf_internal): Merge with *movv2sf_internal_avx.
* config/i386/i386.md (*movdi_internal_rex64) <TYPE_SSEMOV>:
Use %v prefix in insn mnemonic to handle TARGET_AVX.
(*movdi_internal): Add "isa" attribute. Use "maybe_vex" instead of
"vex" in "prefix" attribute calculation.
(*movdf_internal): Output AVX mnemonics. Add "prefix" attribute.
2011-05-02 Stuart Henderson <shenders@gcc.gnu.org>
PR target/47951
......@@ -38,8 +52,7 @@
* config/m68k/m68k.h (enum uarch_type, enum target_device): Move
to m68k-opts.h.
(m68k_library_id_string): Remove declaration.
* config/m68k/m68k.opt (config/m68k/m68k-opts.h): New
HeaderInclude.
* config/m68k/m68k.opt (config/m68k/m68k-opts.h): New HeaderInclude.
(m68k_library_id_string): New Variable.
(march=, mcpu=, mtune=): Use Enum and Var.
......
gcc/config/i386/i386.md
......@@ -1999,17 +1999,9 @@
return "movdq2q\t{%1, %0|%0, %1}";
case TYPE_SSEMOV:
if (TARGET_AVX)
{
if (get_attr_mode (insn) == MODE_TI)
return "vmovdqa\t{%1, %0|%0, %1}";
else
return "vmovq\t{%1, %0|%0, %1}";
}
if (get_attr_mode (insn) == MODE_TI)
return "movdqa\t{%1, %0|%0, %1}";
/* FALLTHRU */
return "%vmovdqa\t{%1, %0|%0, %1}";
return "%vmovq\t{%1, %0|%0, %1}";
case TYPE_MMXMOV:
/* Moves from and into integer register is done using movd
......@@ -2130,10 +2122,14 @@
movlps\t{%1, %0|%0, %1}
movaps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}"
[(set_attr "type" "*,*,mmx,mmxmov,mmxmov,sselog1,ssemov,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov")
[(set (attr "isa")
(if_then_else (eq_attr "alternative" "9,10,11,12")
(const_string "noavx")
(const_string "base")))
(set_attr "type" "*,*,mmx,mmxmov,mmxmov,sselog1,ssemov,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov")
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "5,6,7,8")
(const_string "vex")
(const_string "maybe_vex")
(const_string "orig")))
(set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,TI,DI,V4SF,V2SF,V4SF,V2SF")])
......@@ -3131,17 +3127,17 @@
switch (get_attr_mode (insn))
{
case MODE_V4SF:
return "xorps\t%0, %0";
return "%vxorps\t%0, %d0";
case MODE_V2DF:
if (TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
return "xorps\t%0, %0";
return "%vxorps\t%0, %d0";
else
return "xorpd\t%0, %0";
return "%vxorpd\t%0, %d0";
case MODE_TI:
if (TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
return "xorps\t%0, %0";
return "%vxorps\t%0, %d0";
else
return "pxor\t%0, %0";
return "%vpxor\t%0, %d0";
default:
gcc_unreachable ();
}
......@@ -3151,34 +3147,62 @@
switch (get_attr_mode (insn))
{
case MODE_V4SF:
return "movaps\t{%1, %0|%0, %1}";
return "%vmovaps\t{%1, %0|%0, %1}";
case MODE_V2DF:
if (TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
return "movaps\t{%1, %0|%0, %1}";
return "%vmovaps\t{%1, %0|%0, %1}";
else
return "movapd\t{%1, %0|%0, %1}";
return "%vmovapd\t{%1, %0|%0, %1}";
case MODE_TI:
if (TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL)
return "movaps\t{%1, %0|%0, %1}";
return "%vmovaps\t{%1, %0|%0, %1}";
else
return "movdqa\t{%1, %0|%0, %1}";
return "%vmovdqa\t{%1, %0|%0, %1}";
case MODE_DI:
return "movq\t{%1, %0|%0, %1}";
return "%vmovq\t{%1, %0|%0, %1}";
case MODE_DF:
return "movsd\t{%1, %0|%0, %1}";
if (TARGET_AVX)
{
if (REG_P (operands[0]) && REG_P (operands[1]))
return "vmovsd\t{%1, %0, %0|%0, %0, %1}";
else
return "vmovsd\t{%1, %0|%0, %1}";
}
else
return "movsd\t{%1, %0|%0, %1}";
case MODE_V1DF:
return "movlpd\t{%1, %0|%0, %1}";
if (TARGET_AVX)
{
if (REG_P (operands[0]))
return "vmovlpd\t{%1, %0, %0|%0, %0, %1}";
else
return "vmovlpd\t{%1, %0|%0, %1}";
}
else
return "movlpd\t{%1, %0|%0, %1}";
case MODE_V2SF:
return "movlps\t{%1, %0|%0, %1}";
if (TARGET_AVX)
{
if (REG_P (operands[0]))
return "vmovlps\t{%1, %0, %0|%0, %0, %1}";
else
return "vmovlps\t{%1, %0|%0, %1}";
}
else
return "movlps\t{%1, %0|%0, %1}";
default:
gcc_unreachable ();
}
default:
gcc_unreachable();
gcc_unreachable ();
}
}
[(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov")
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "0,1,2,3,4")
(const_string "orig")
(const_string "maybe_vex")))
(set (attr "prefix_data16")
(if_then_else (eq_attr "mode" "V1DF")
(const_string "1")
......@@ -3457,8 +3481,12 @@
return "%vmovss\t{%1, %d0|%d0, %1}";
case 7:
if (TARGET_AVX)
return REG_P (operands[1]) ? "vmovss\t{%1, %0, %0|%0, %0, %1}"
: "vmovss\t{%1, %0|%0, %1}";
{
if (REG_P (operands[1]))
return "vmovss\t{%1, %0, %0|%0, %0, %1}";
else
return "vmovss\t{%1, %0|%0, %1}";
}
else
return "movss\t{%1, %0|%0, %1}";
case 8:
......
gcc/config/i386/mmx.md
;; GCC machine description for MMX and 3dNOW! instructions
;; Copyright (C) 2005, 2007, 2008, 2009, 2010
;; Copyright (C) 2005, 2007, 2008, 2009, 2010, 2011
;; Free Software Foundation, Inc.
;;
;; This file is part of GCC.
......@@ -82,8 +82,8 @@
%vpxor\t%0, %d0
%vmovq\t{%1, %0|%0, %1}
%vmovq\t{%1, %0|%0, %1}
%vmovd\t{%1, %0|%0, %1}
%vmovd\t{%1, %0|%0, %1}"
%vmovq\t{%1, %0|%0, %1}
%vmovq\t{%1, %0|%0, %1}"
[(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,ssemov")
(set_attr "unit" "*,*,*,*,*,*,mmx,mmx,*,*,*,*,*")
(set_attr "prefix_rep" "*,*,*,*,*,*,1,1,*,1,*,*,*")
......@@ -98,40 +98,12 @@
(const_string "orig")))
(set_attr "mode" "DI")])
(define_insn "*mov<mode>_internal_avx"
[(set (match_operand:MMXMODEI8 0 "nonimmediate_operand"
"=!?y,!y,!?y,m ,!y ,*Y2,*Y2,*Y2 ,m ,r ,m")
(match_operand:MMXMODEI8 1 "vector_move_operand"
"C ,!y,m ,!?y,*Y2,!y ,C ,*Y2m,*Y2,irm,r"))]
"TARGET_AVX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
pxor\t%0, %0
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
movdq2q\t{%1, %0|%0, %1}
movq2dq\t{%1, %0|%0, %1}
vpxor\t%0, %0, %0
vmovq\t{%1, %0|%0, %1}
vmovq\t{%1, %0|%0, %1}
#
#"
[(set_attr "type" "mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,*,*")
(set_attr "unit" "*,*,*,*,mmx,mmx,*,*,*,*,*")
(set_attr "prefix_rep" "*,*,*,*,1,1,*,*,*,*,*")
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "6,7,8")
(const_string "vex")
(const_string "orig")))
(set_attr "mode" "DI,DI,DI,DI,DI,DI,TI,DI,DI,DI,DI")])
(define_insn "*mov<mode>_internal"
[(set (match_operand:MMXMODEI8 0 "nonimmediate_operand"
"=!?y,!y,!?y,m ,!y ,*Y2,*Y2,*Y2 ,m ,*x,*x,*x,m ,r ,m")
(match_operand:MMXMODEI8 1 "vector_move_operand"
"C ,!y,m ,!?y,*Y2,!y ,C ,*Y2m,*Y2,C ,*x,m ,*x,irm,r"))]
"TARGET_MMX
"!TARGET_64BIT && TARGET_MMX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
pxor\t%0, %0
......@@ -140,19 +112,38 @@
movq\t{%1, %0|%0, %1}
movdq2q\t{%1, %0|%0, %1}
movq2dq\t{%1, %0|%0, %1}
pxor\t%0, %0
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
%vpxor\t%0, %d0
%vmovq\t{%1, %0|%0, %1}
%vmovq\t{%1, %0|%0, %1}
xorps\t%0, %0
movaps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
#
#"
[(set_attr "type" "mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov,*,*")
[(set (attr "isa")
(if_then_else (eq_attr "alternative" "9,10,11,12")
(const_string "noavx")
(const_string "base")))
(set_attr "type" "mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov,*,*")
(set_attr "unit" "*,*,*,*,mmx,mmx,*,*,*,*,*,*,*,*,*")
(set_attr "prefix_rep" "*,*,*,*,1,1,*,1,*,*,*,*,*,*,*")
(set_attr "prefix_data16" "*,*,*,*,*,*,*,*,1,*,*,*,*,*,*")
(set (attr "prefix_rep")
(if_then_else
(ior (eq_attr "alternative" "4,5")
(and (eq_attr "alternative" "7")
(eq (symbol_ref "TARGET_AVX") (const_int 0))))
(const_string "1")
(const_string "*")))
(set (attr "prefix_data16")
(if_then_else
(and (eq_attr "alternative" "8")
(eq (symbol_ref "TARGET_AVX") (const_int 0)))
(const_string "1")
(const_string "*")))
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "6,7,8")
(const_string "maybe_vex")
(const_string "orig")))
(set_attr "mode" "DI,DI,DI,DI,DI,DI,TI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
(define_expand "movv2sf"
......@@ -164,38 +155,6 @@
DONE;
})
(define_insn "*movv2sf_internal_rex64_avx"
[(set (match_operand:V2SF 0 "nonimmediate_operand"
"=rm,r,!?y,!y,!?y,m ,!y,Y2,x,x,x,m,r,x")
(match_operand:V2SF 1 "vector_move_operand"
"Cr ,m,C ,!y,m ,!?y,Y2,!y,C,x,m,x,x,r"))]
"TARGET_64BIT && TARGET_AVX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
mov{q}\t{%1, %0|%0, %1}
mov{q}\t{%1, %0|%0, %1}
pxor\t%0, %0
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
movdq2q\t{%1, %0|%0, %1}
movq2dq\t{%1, %0|%0, %1}
vxorps\t%0, %0, %0
vmovaps\t{%1, %0|%0, %1}
vmovlps\t{%1, %0, %0|%0, %0, %1}
vmovlps\t{%1, %0|%0, %1}
vmovq\t{%1, %0|%0, %1}
vmovq\t{%1, %0|%0, %1}"
[(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov")
(set_attr "unit" "*,*,*,*,*,*,mmx,mmx,*,*,*,*,*,*")
(set_attr "prefix_rep" "*,*,*,*,*,*,1,1,*,*,*,*,*,*")
(set_attr "length_vex" "*,*,*,*,*,*,*,*,*,*,*,*,4,4")
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "8,9,10,11,12,13")
(const_string "vex")
(const_string "orig")))
(set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
(define_insn "*movv2sf_internal_rex64"
[(set (match_operand:V2SF 0 "nonimmediate_operand"
"=rm,r,!?y,!y,!?y,m ,!y ,*Y2,x,x,x,m,r ,Yi")
......@@ -212,23 +171,33 @@
movq\t{%1, %0|%0, %1}
movdq2q\t{%1, %0|%0, %1}
movq2dq\t{%1, %0|%0, %1}
xorps\t%0, %0
movaps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
movd\t{%1, %0|%0, %1}
movd\t{%1, %0|%0, %1}"
%vxorps\t%0, %d0
%vmovaps\t{%1, %0|%0, %1}
%vmovlps\t{%1, %0|%0, %1}
%vmovlps\t{%1, %0|%0, %1}
%vmovq\t{%1, %0|%0, %1}
%vmovq\t{%1, %0|%0, %1}"
[(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov")
(set_attr "unit" "*,*,*,*,*,*,mmx,mmx,*,*,*,*,*,*")
(set_attr "prefix_rep" "*,*,*,*,*,*,1,1,*,*,*,*,*,*")
(set (attr "length_vex")
(if_then_else
(and (eq_attr "alternative" "12,13")
(ne (symbol_ref "TARGET_AVX") (const_int 0)))
(const_string "4")
(const_string "*")))
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "8,9,10,11,12,13")
(const_string "maybe_vex")
(const_string "orig")))
(set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
(define_insn "*movv2sf_internal_avx"
(define_insn "*movv2sf_internal"
[(set (match_operand:V2SF 0 "nonimmediate_operand"
"=!?y,!y,!?y,m ,!y ,*Y2,*x,*x,*x,m ,r ,m")
(match_operand:V2SF 1 "vector_move_operand"
"C ,!y,m ,!?y,*Y2,!y ,C ,*x,m ,*x,irm,r"))]
"TARGET_AVX
"!TARGET_64BIT && TARGET_MMX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
pxor\t%0, %0
......@@ -237,10 +206,10 @@
movq\t{%1, %0|%0, %1}
movdq2q\t{%1, %0|%0, %1}
movq2dq\t{%1, %0|%0, %1}
vxorps\t%0, %0, %0
vmovaps\t{%1, %0|%0, %1}
vmovlps\t{%1, %0, %0|%0, %0, %1}
vmovlps\t{%1, %0|%0, %1}
%vxorps\t%0, %d0
%vmovaps\t{%1, %0|%0, %1}
%vmovlps\t{%1, %0|%0, %1}
%vmovlps\t{%1, %0|%0, %1}
#
#"
[(set_attr "type" "mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*")
......@@ -248,35 +217,10 @@
(set_attr "prefix_rep" "*,*,*,*,1,1,*,*,*,*,*,*")
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "6,7,8,9")
(const_string "vex")
(const_string "maybe_vex")
(const_string "orig")))
(set_attr "mode" "DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
(define_insn "*movv2sf_internal"
[(set (match_operand:V2SF 0 "nonimmediate_operand"
"=!?y,!y,!?y,m ,!y ,*Y2,*x,*x,*x,m ,r ,m")
(match_operand:V2SF 1 "vector_move_operand"
"C ,!y,m ,!?y,*Y2,!y ,C ,*x,m ,*x,irm,r"))]
"TARGET_MMX
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
pxor\t%0, %0
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
movq\t{%1, %0|%0, %1}
movdq2q\t{%1, %0|%0, %1}
movq2dq\t{%1, %0|%0, %1}
xorps\t%0, %0
movaps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
movlps\t{%1, %0|%0, %1}
#
#"
[(set_attr "type" "mmx,mmxmov,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*")
(set_attr "unit" "*,*,*,*,mmx,mmx,*,*,*,*,*,*")
(set_attr "prefix_rep" "*,*,*,*,1,1,*,*,*,*,*,*")
(set_attr "mode" "DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
;; %%% This multiword shite has got to go.
(define_split
[(set (match_operand:MMXMODE 0 "nonimmediate_operand" "")
......
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