invoke.texi: Replace rs6000 dfp switches -mdfp/-mno-dfp with -mhard-dfp/-mno-hard-dfp.

2007-11-07  Andreas Krebbel  <krebbel1@de.ibm.com>

	* doc/invoke.texi: Replace rs6000 dfp switches -mdfp/-mno-dfp
	with -mhard-dfp/-mno-hard-dfp.

From-SVN: r129957

gcc/ChangeLog

+2007-11-07  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	* doc/invoke.texi: Replace rs6000 dfp switches -mdfp/-mno-dfp
+	with -mhard-dfp/-mno-hard-dfp.
+
 2007-11-07  Maxim Kuvyrkov  <maxim@codesourcery.com>
 	    Jakub Jelinek  <jakub@redhat.com>
 

gcc/doc/invoke.texi

@@ -691,7 +691,7 @@ See RS/6000 and PowerPC Options.
 -mpowerpc-gpopt  -mno-powerpc-gpopt @gol
 -mpowerpc-gfxopt  -mno-powerpc-gfxopt @gol
 -mmfcrf  -mno-mfcrf  -mpopcntb  -mno-popcntb  -mfprnd  -mno-fprnd @gol
--mcmpb -mno-cmpb -mmfpgpr -mno-mfpgpr -mdfp -mno-dfp @gol
+-mcmpb -mno-cmpb -mmfpgpr -mno-mfpgpr -mhard-dfp -mno-hard-dfp @gol
 -mnew-mnemonics  -mold-mnemonics @gol
 -mfull-toc   -mminimal-toc  -mno-fp-in-toc  -mno-sum-in-toc @gol
 -m64  -m32  -mxl-compat  -mno-xl-compat  -mpe @gol
@@ -12597,8 +12597,8 @@ These @samp{-m} options are defined for the IBM RS/6000 and PowerPC:
 @itemx -mno-cmpb
 @itemx -mmfpgpr
 @itemx -mno-mfpgpr
-@itemx -mdfp
-@itemx -mno-dfp
+@itemx -mhard-dfp
+@itemx -mno-hard-dfp
 @opindex mpower
 @opindex mno-power
 @opindex mpower2
@@ -12621,8 +12621,8 @@ These @samp{-m} options are defined for the IBM RS/6000 and PowerPC:
 @opindex mno-cmpb
 @opindex mmfpgpr
 @opindex mno-mfpgpr
-@opindex mdfp
-@opindex mno-dfp
+@opindex mhard-dfp
+@opindex mno-hard-dfp
 GCC supports two related instruction set architectures for the
 RS/6000 and PowerPC@.  The @dfn{POWER} instruction set are those
 instructions supported by the @samp{rios} chip set used in the original
@@ -12674,7 +12674,7 @@ The @option{-mmfpgpr} option allows GCC to generate the FP move to/from
 general purpose register instructions implemented on the POWER6X
 processor and other processors that support the extended PowerPC V2.05
 architecture.
-The @option{-mdfp} option allows GCC to generate the decimal floating
+The @option{-mhard-dfp} option allows GCC to generate the decimal floating
 point instructions implemented on some POWER processors.
 
 The @option{-mpowerpc64} option allows GCC to generate the additional