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riscv-gcc-1
Commit 4d5ad877 by Kazu Hirata Committed by Kazu Hirata
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h8300.md: Replace spaces with tabs. 

	* config/h8300/h8300.md: Replace spaces with tabs.
	* config/h8300/t-h8300: Remove a trailing empty line.

From-SVN: r59177
parent 17fa74a2
Showing with 31 additions and 27 deletions
gcc/ChangeLog
2002-11-16 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md: Replace spaces with tabs.
* config/h8300/t-h8300: Remove a trailing empty line.
2002-11-16 Kazu Hirata <kazu@cs.umass.edu>
* tlink.c: Fix formatting.
2002-11-16 David Edelsohn <edelsohn@gnu.org>
......
gcc/config/h8300/h8300.md
......@@ -90,7 +90,7 @@
(define_attr "adjust_length" "yes,no"
(cond [(eq_attr "type" "branch") (const_string "no")]
(const_string "yes")))
(const_string "yes")))
;; Condition code settings.
;;
......@@ -114,9 +114,9 @@
(define_insn "pushqi1_h8300"
[(parallel [(set (reg:HI SP_REG)
(plus:HI (reg:HI SP_REG) (const_int -2)))
(set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -1)))
(match_operand:QI 0 "register_operand" "r"))])]
(plus:HI (reg:HI SP_REG) (const_int -2)))
(set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -1)))
(match_operand:QI 0 "register_operand" "r"))])]
"TARGET_H8300"
"mov.w\\t%T0,@-r7"
[(set_attr "length" "2")
......@@ -124,9 +124,9 @@
(define_insn "pushqi1_h8300hs"
[(parallel [(set (reg:SI SP_REG)
(plus:SI (reg:SI SP_REG) (const_int -4)))
(set (mem:QI (plus:SI (reg:SI SP_REG) (const_int -3)))
(match_operand:QI 0 "register_operand" "r"))])]
(plus:SI (reg:SI SP_REG) (const_int -4)))
(set (mem:QI (plus:SI (reg:SI SP_REG) (const_int -3)))
(match_operand:QI 0 "register_operand" "r"))])]
"TARGET_H8300H || TARGET_H8300S"
"mov.l\\t%S0,@-er7"
[(set_attr "length" "4")
......@@ -208,15 +208,15 @@
(define_expand "pushhi1_h8300"
[(set (mem:HI (pre_dec:HI (reg:HI SP_REG)))
(match_operand:HI 0 "register_operand" ""))]
(match_operand:HI 0 "register_operand" ""))]
"TARGET_H8300"
"")
(define_insn "pushhi1_h8300hs"
[(parallel [(set (reg:SI SP_REG)
(plus:SI (reg:SI SP_REG) (const_int -4)))
(set (mem:HI (plus:SI (reg:SI SP_REG) (const_int -2)))
(match_operand:HI 0 "register_operand" "r"))])]
(plus:SI (reg:SI SP_REG) (const_int -4)))
(set (mem:HI (plus:SI (reg:SI SP_REG) (const_int -2)))
(match_operand:HI 0 "register_operand" "r"))])]
"TARGET_H8300H || TARGET_H8300S"
"mov.l\\t%S0,@-er7"
[(set_attr "length" "4")
......@@ -510,7 +510,7 @@
}
/* Look for constants that can be obtained by subs, inc, and
dec to 0. */
dec to 0. */
switch (val & 0xffffffff)
{
case 0xffffffff:
......@@ -1491,9 +1491,9 @@
{
if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0
&& (GET_CODE (operands[1]) == GT
|| GET_CODE (operands[1]) == GE
|| GET_CODE (operands[1]) == LE
|| GET_CODE (operands[1]) == LT))
|| GET_CODE (operands[1]) == GE
|| GET_CODE (operands[1]) == LE
|| GET_CODE (operands[1]) == LT))
{
cc_status.flags &= ~CC_OVERFLOW_UNUSABLE;
return 0;
......@@ -1520,9 +1520,9 @@
{
if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0
&& (GET_CODE (operands[1]) == GT
|| GET_CODE (operands[1]) == GE
|| GET_CODE (operands[1]) == LE
|| GET_CODE (operands[1]) == LT))
|| GET_CODE (operands[1]) == GE
|| GET_CODE (operands[1]) == LE
|| GET_CODE (operands[1]) == LT))
{
cc_status.flags &= ~CC_OVERFLOW_UNUSABLE;
return 0;
......@@ -2138,7 +2138,7 @@
(define_insn ""
[(set (match_operand:HI 0 "register_operand" "=r")
(ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
(ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
(match_operand:HI 2 "register_operand" "0")))]
"REG_P (operands[0])
&& REG_P (operands[1])
......@@ -2149,7 +2149,7 @@
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(ior:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
(ior:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
(match_operand:SI 2 "register_operand" "0")))]
"(TARGET_H8300H || TARGET_H8300S)
&& REG_P (operands[0])
......@@ -2161,7 +2161,7 @@
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(ior:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
(ior:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
(match_operand:SI 2 "register_operand" "0")))]
"REG_P (operands[0])
&& REG_P (operands[1])
......@@ -2172,7 +2172,7 @@
(define_insn ""
[(set (match_operand:HI 0 "register_operand" "=r")
(xor:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
(xor:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
(match_operand:HI 2 "register_operand" "0")))]
"REG_P (operands[0])
&& REG_P (operands[1])
......@@ -2183,7 +2183,7 @@
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(xor:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
(xor:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "r"))
(match_operand:SI 2 "register_operand" "0")))]
"(TARGET_H8300H || TARGET_H8300S)
&& REG_P (operands[0])
......@@ -2195,7 +2195,7 @@
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(xor:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
(xor:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r"))
(match_operand:SI 2 "register_operand" "0")))]
"REG_P (operands[0])
&& REG_P (operands[1])
......@@ -2206,7 +2206,7 @@
(define_insn ""
[(set (match_operand:HI 0 "register_operand" "=r")
(ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
(ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "0"))
(ashift:HI (match_operand:HI 2 "register_operand" "r")
(const_int 8))))]
"REG_P (operands[0])
......@@ -2218,7 +2218,7 @@
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(ior:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
(ior:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "0"))
(ashift:SI (match_operand:SI 2 "register_operand" "r")
(const_int 16))))]
"(TARGET_H8300H || TARGET_H8300S)
......
gcc/config/h8300/t-h8300
......@@ -31,4 +31,3 @@ MULTILIB_EXCEPTIONS = mint32
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
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