[rs6000] Enable x86-compat vector intrinsics testing

The testsuite tests for the compatibility implementations of x86 vector
intrinsics for "powerpc" had been inadvertently made to PASS
without actually running the test code.

This patch removes the code which kept the tests from running the actual
test code.

2018-12-06  Paul A. Clarke  <pc@us.ibm.com>

[gcc/testsuite]

	PR target/88316
	* gcc.target/powerpc/bmi-check.h: Remove test for
	__BUILTIN_CPU_SUPPORTS__, thereby enabling test code to run.
	* gcc.target/powerpc/bmi2-check.h: Likewise.
	* gcc.target/powerpc/mmx-check.h: Likewise.
	* gcc.target/powerpc/sse-check.h: Likewise.
	* gcc.target/powerpc/sse2-check.h: Likewise.
	* gcc.target/powerpc/sse3-check.h: Likewise.

From-SVN: r266870

gcc/testsuite/ChangeLog

 2018-12-06  Paul A. Clarke  <pc@us.ibm.com>
 
 	PR target/88316
+	* gcc.target/powerpc/bmi-check.h: Remove test for
+	__BUILTIN_CPU_SUPPORTS__, thereby enabling test code to run.
+	* gcc.target/powerpc/bmi2-check.h: Likewise.
+	* gcc.target/powerpc/mmx-check.h: Likewise.
+	* gcc.target/powerpc/sse-check.h: Likewise.
+	* gcc.target/powerpc/sse2-check.h: Likewise.
+	* gcc.target/powerpc/sse3-check.h: Likewise.
+
+2018-12-06  Paul A. Clarke  <pc@us.ibm.com>
+
+	PR target/88316
 	* gcc.target/powerpc/mmx-packssdw-1.c: Fixes for big-endian.
 	* gcc.target/powerpc/mmx-packsswb-1.c: Likewise.
 	* gcc.target/powerpc/mmx-packuswb-1.c: Likewise.

gcc/testsuite/gcc.target/powerpc/bmi-check.h

@@ -13,19 +13,9 @@ do_test (void)
 int
 main ()
 {
-#ifdef __BUILTIN_CPU_SUPPORTS__
-  /* Need 64-bit for 64-bit longs as single instruction.  */
-  if ( __builtin_cpu_supports ("ppc64") )
-    {
-      do_test ();
+  do_test ();
 #ifdef DEBUG
-      printf ("PASSED\n");
+  printf ("PASSED\n");
 #endif
-    }
-#ifdef DEBUG
-  else
-    printf ("SKIPPED\n");
-#endif
-#endif /* __BUILTIN_CPU_SUPPORTS__ */
   return 0;
 }

gcc/testsuite/gcc.target/powerpc/bmi2-check.h

@@ -13,22 +13,10 @@ do_test (void)
 int
 main ()
 {
-#ifdef __BUILTIN_CPU_SUPPORTS__
-  /* The BMI2 test for pext test requires the Bit Permute doubleword
-     (bpermd) instruction added in PowerISA 2.06 along with the VSX
-     facility.  So we can test for arch_2_06.  */
-  if ( __builtin_cpu_supports ("arch_2_06") )
-    {
-      do_test ();
+  do_test ();
 #ifdef DEBUG
-      printf ("PASSED\n");
+  printf ("PASSED\n");
 #endif
-    }
-#ifdef DEBUG
-  else
-    printf ("SKIPPED\n");
-#endif
-#endif /* __BUILTIN_CPU_SUPPORTS__ */
   return 0;
 }
 

gcc/testsuite/gcc.target/powerpc/mmx-check.h

@@ -13,23 +13,9 @@ do_test (void)
 int
 main ()
   {
-#ifdef __BUILTIN_CPU_SUPPORTS__
-    /* Many MMX intrinsics are simpler / faster to implement by
-       transferring the __m64 (long int) to vector registers for SIMD
-       operations.  To be efficient we also need the direct register
-       transfer instructions from POWER8.  So we can test for
-       arch_2_07.  */
-    if ( __builtin_cpu_supports ("arch_2_07") )
-      {
-	do_test ();
+    do_test ();
 #ifdef DEBUG
-	printf ("PASSED\n");
+    printf ("PASSED\n");
 #endif
-      }
-#ifdef DEBUG
-    else
-      printf ("SKIPPED\n");
-#endif
-#endif /* __BUILTIN_CPU_SUPPORTS__ */
     return 0;
   }

gcc/testsuite/gcc.target/powerpc/sse-check.h

 #include <stdlib.h>
 #include "m128-check.h"
 
-#define DEBUG 1
+// #define DEBUG 1
 
 #define TEST sse_test
 
@@ -17,25 +17,10 @@ do_test (void)
 int
 main ()
   {
-#ifdef __BUILTIN_CPU_SUPPORTS__
-    /* Most SSE intrinsic operations can be implemented via VMX
-       instructions, but some operations may be faster / simpler
-       using the POWER8 VSX instructions.  This is especially true
-       when we are transferring / converting to / from __m64 types.
-       The direct register transfer instructions from POWER8 are
-       especially important.  So we test for arch_2_07.  */
-    if ( __builtin_cpu_supports ("arch_2_07") )
-      {
-	do_test ();
+    do_test ();
 #ifdef DEBUG
-	printf ("PASSED\n");
+    printf ("PASSED\n");
 #endif
-      }
-#ifdef DEBUG
-    else
-    printf ("SKIPPED\n");
-#endif
-#endif /* __BUILTIN_CPU_SUPPORTS__ */
     return 0;
   }
 

gcc/testsuite/gcc.target/powerpc/sse2-check.h

@@ -9,8 +9,6 @@
 /* define DEBUG replace abort with printf on error.  */
 //#define DEBUG 1
 
-#if 1
-
 #define TEST sse2_test
 
 static void sse2_test (void);
@@ -25,28 +23,9 @@ do_test (void)
 int
 main ()
   {
-#ifdef __BUILTIN_CPU_SUPPORTS__
-    /* Most SSE2 (vector double) intrinsic operations require VSX
-       instructions, but some operations may need only VMX
-       instructions.  This also true for SSE2 scalar doubles as they
-       imply that "other half" of the vector remains unchanged or set
-       to zeros.  The VSX scalar operations leave ther "other half"
-       undefined, and require additional merge operations.
-       Some conversions (to/from integer) need the  direct register
-       transfer instructions from POWER8 for best performance.
-       So we test for arch_2_07.  */
-    if ( __builtin_cpu_supports ("arch_2_07") )
-      {
-	do_test ();
-#ifdef DEBUG
-	printf ("PASSED\n");
-#endif
-      }
+    do_test ();
 #ifdef DEBUG
-    else
-    printf ("SKIPPED\n");
+    printf ("PASSED\n");
 #endif
-#endif /* __BUILTIN_CPU_SUPPORTS__ */
     return 0;
   }
-#endif

gcc/testsuite/gcc.target/powerpc/sse3-check.h

@@ -20,24 +20,9 @@ do_test (void)
 int
 main ()
 {
-#ifdef __BUILTIN_CPU_SUPPORTS__
-  /* Most SSE intrinsic operations can be implemented via VMX
-     instructions, but some operations may be faster / simpler
-     using the POWER8 VSX instructions.  This is especially true
-     when we are transferring / converting to / from __m64 types.
-     The direct register transfer instructions from POWER8 are
-     especially important.  So we test for arch_2_07.  */
-  if (__builtin_cpu_supports ("arch_2_07"))
-    {
-      do_test ();
+  do_test ();
 #ifdef DEBUG
-      printf ("PASSED\n");
+  printf ("PASSED\n");
 #endif
-    }
-#ifdef DEBUG
-  else
-    printf ("SKIPPED\n");
-#endif
-#endif /* __BUILTIN_CPU_SUPPORTS__ */
   return 0;
 }