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lvzhengyang
riscv-gcc-1
Commits
4c82e145
Commit
4c82e145
authored
25 years ago
by
Nick Clifton
Committed by
Nick Clifton
25 years ago
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Fix psimode truncation patterns to not accept MEMs that are not valid for
PSImode. From-SVN: r30721
parent
4dc9341c
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4 changed files
with
30 additions
and
2 deletions
+30
-2
gcc/ChangeLog
+12
-0
gcc/config/mn10200/mn10200.c
+13
-0
gcc/config/mn10200/mn10200.h
+3
-0
gcc/config/mn10200/mn10200.md
+2
-2
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gcc/ChangeLog
View file @
4c82e145
Tue
Nov
30
14
:
58
:
14
1999
Nick
Clifton
<
nickc
@cygnus
.
com
>
*
config
/
mn10200
/
mn10200
.
h
(
PREDICATE_CODES
)
:
Add
psimode_truncation_operand
.
*
config
/
mn10200
/
mn10200
.
c
(
psimode_truncation_operand
)
:
New
function
.
Return
true
if
the
operand
is
either
a
MEM
valid
for
a
PSImode
address
or
not
a
MEM
at
all
.
*
config
/
mn10200
/
mn10200
.
md
(
truncsipsi2
)
:
Use
psimode_truncation_operand
.
1999
-
11
-
30
Michael
Hayes
<
m
.
hayes
@elec
.
canterbury
.
ac
.
nz
>
*
flow
.
c
(
flow_nodes_print
,
flow_loops_cfg_dump
)
:
New
functions
.
...
...
This diff is collapsed.
Click to expand it.
gcc/config/mn10200/mn10200.c
View file @
4c82e145
...
...
@@ -875,6 +875,19 @@ constant_memory_operand (op, mode)
return
GET_CODE
(
op
)
==
MEM
&&
CONSTANT_ADDRESS_P
(
XEXP
(
op
,
0
));
}
/* Return true if OP is valid for a psi mode truncation operand.
It must either be a memory operand which is valid for a PSImode
address, or if it is not a memory operand at all. */
int
psimode_truncation_operand
(
op
,
mode
)
rtx
op
;
enum
machine_mode
mode
;
{
return
(
general_operand
(
op
,
mode
)
&&
(
GET_CODE
(
op
)
!=
MEM
||
memory_address_p
(
PSImode
,
XEXP
(
op
,
0
))));
}
/* What (if any) secondary registers are needed to move IN with mode
MODE into a register from in register class CLASS.
...
...
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gcc/config/mn10200/mn10200.h
View file @
4c82e145
...
...
@@ -1063,6 +1063,8 @@ do { char dstr[30]; \
#define PREDICATE_CODES \
{"call_address_operand", { SYMBOL_REF, REG }}, \
{"constant_memory_operand", { MEM }}, \
{"psimode_truncation_operand",{ PLUS, CONST_INT, CONST_DOUBLE, CONST, \
SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM }},\
{"extendpsi_operand", { PLUS, CONST_INT, CONST_DOUBLE, CONST, \
SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM }}, \
{"nshift_operator", { ASHIFTRT, LSHIFTRT, ASHIFT }},
...
...
@@ -1078,5 +1080,6 @@ extern enum reg_class secondary_reload_class ();
extern
char
*
emit_a_shift
();
extern
char
*
output_tst
();
extern
int
extendpsi_operand
();
extern
int
psimode_truncation_operand
();
extern
struct
rtx_def
*
zero_dreg
;
extern
struct
rtx_def
*
zero_areg
;
This diff is collapsed.
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gcc/config/mn10200/mn10200.md
View file @
4c82e145
...
...
@@ -1165,7 +1165,7 @@
(define_insn "truncsipsi2"
[
(set (match_operand:PSI 0 "general_operand" "=a,?d,?
*
d,da")
(truncate:PSI (match_operand:SI 1 "
general
_operand" "m,?m,?
*
d,i")))]
(truncate:PSI (match_operand:SI 1 "
psimode_truncation
_operand" "m,?m,?
*
d,i")))]
""
"@
mov %1,%0
...
...
@@ -1785,7 +1785,7 @@
(define_insn ""
[
(set (match_operand:PSI 0 "general_operand" "=d,d,a,da")
(truncate:PSI
(ashift:SI (match_operand:SI 1 "
general
_operand" "d,m,m,i")
(ashift:SI (match_operand:SI 1 "
psimode_truncation
_operand" "d,m,m,i")
(match_operand:HI 2 "const_int_operand" "i,i,i,i"))))]
""
"
*
...
...
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