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lvzhengyang
riscv-gcc-1
Commits
4bec9f7d
Commit
4bec9f7d
authored
Nov 29, 2000
by
Nick Clifton
Committed by
Nick Clifton
Nov 29, 2000
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Fix pic_l;oad_addr to work in Thumb mode.
From-SVN: r37838
parent
abfadcb1
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3 changed files
with
40 additions
and
15 deletions
+40
-15
gcc/ChangeLog
+10
-0
gcc/config/arm/arm.c
+17
-5
gcc/config/arm/arm.md
+13
-10
No files found.
gcc/ChangeLog
View file @
4bec9f7d
2000-11-28 Nick Clifton <nickc@redhat.com>
* config/arm/arm.md (pic_load_addr): Split into
pic_load_addr_arm and pic_load_addr_thumb.
* config/arm/arm.c (legitimize_pic_address): Generate either
ARM or Thumb versions of pic_load_addr.
(arm_finalize_pic): Generate either ARM or Thumb versions of
pic_load_addr.
2000-11-28 Richard Henderson <rth@redhat.com>
* calls.c (expand_call): Defer const/pure NO_DEFER_POP until
...
...
gcc/config/arm/arm.c
View file @
4bec9f7d
...
...
@@ -1920,7 +1920,10 @@ legitimize_pic_address (orig, mode, reg)
else
address
=
reg
;
emit_insn
(
gen_pic_load_addr
(
address
,
orig
));
if
(
TARGET_ARM
)
emit_insn
(
gen_pic_load_addr_arm
(
address
,
orig
));
else
emit_insn
(
gen_pic_load_addr_thumb
(
address
,
orig
));
pic_ref
=
gen_rtx_MEM
(
Pmode
,
gen_rtx_PLUS
(
Pmode
,
pic_offset_table_rtx
,
...
...
@@ -1993,8 +1996,12 @@ legitimize_pic_address (orig, mode, reg)
if
(
NEED_GOT_RELOC
)
{
rtx
pic_ref
,
address
=
gen_reg_rtx
(
Pmode
);
if
(
TARGET_ARM
)
emit_insn
(
gen_pic_load_addr_arm
(
address
,
orig
));
else
emit_insn
(
gen_pic_load_addr_thumb
(
address
,
orig
));
emit_insn
(
gen_pic_load_addr
(
address
,
orig
));
pic_ref
=
gen_rtx_PLUS
(
Pmode
,
pic_offset_table_rtx
,
address
);
emit_move_insn
(
address
,
pic_ref
);
...
...
@@ -2044,11 +2051,16 @@ arm_finalize_pic ()
pic_rtx
=
gen_rtx_CONST
(
Pmode
,
gen_rtx_MINUS
(
Pmode
,
pic_tmp2
,
pic_tmp
));
emit_insn
(
gen_pic_load_addr
(
pic_offset_table_rtx
,
pic_rtx
));
if
(
TARGET_ARM
)
emit_insn
(
gen_pic_add_dot_plus_eight
(
pic_offset_table_rtx
,
l1
));
{
emit_insn
(
gen_pic_load_addr_arm
(
pic_offset_table_rtx
,
pic_rtx
));
emit_insn
(
gen_pic_add_dot_plus_eight
(
pic_offset_table_rtx
,
l1
));
}
else
emit_insn
(
gen_pic_add_dot_plus_four
(
pic_offset_table_rtx
,
l1
));
{
emit_insn
(
gen_pic_load_addr_thumb
(
pic_offset_table_rtx
,
pic_rtx
));
emit_insn
(
gen_pic_add_dot_plus_four
(
pic_offset_table_rtx
,
l1
));
}
seq
=
gen_sequence
();
end_sequence
();
...
...
gcc/config/arm/arm.md
View file @
4bec9f7d
...
...
@@ -4055,20 +4055,23 @@
;; the insn alone, and to force the minipool generation pass to then move
;; the GOT symbol to memory.
(define_insn "pic_load_addr"
(define_insn "pic_load_addr
_arm
"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec:SI [(match_operand:SI 1 "" "mX")] 3))]
"TARGET_
EITHER
&& flag_pic"
"TARGET_
ARM
&& flag_pic"
"ldr%?\\t%0, %1"
[(set_attr "type" "load")
(set (attr "pool_range")
(if_then_else (eq_attr "is_thumb" "yes")
(const_int 1024)
(const_int 4096)))
(set (attr "neg_pool_range")
(if_then_else (eq_attr "is_thumb" "yes")
(const_int 0)
(const_int 4084)))]
(set (attr "pool_range") (const_int 4096))
(set (attr "neg_pool_range") (const_int 4084))]
)
(define_insn "pic_load_addr_thumb"
[(set (match_operand:SI 0 "s_register_operand" "=l")
(unspec:SI [(match_operand:SI 1 "" "mX")] 3))]
"TARGET_THUMB && flag_pic"
"ldr\\t%0, %1"
[(set_attr "type" "load")
(set (attr "pool_range") (const_int 1024))]
)
;; This variant is used for AOF assembly, since it needs to mention the
...
...
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