Commit 4bdc1ac7 by Philip Blundell Committed by Nick Clifton

Apply Philip Blundell <pb@nexus.co.uk>'s patch to add PIC support to the Thumb.

From-SVN: r28268
parent 3a27d575
Mon Jul 26 17:24:51 1999 Philip Blundell <pb@nexus.co.uk>
* config/arm/thumb.h (THUMB_FLAG_SINGLE_PIC_BASE): Define.
(TARGET_SINGLE_PIC_BASE): Likewise.
(GOT_PCREL, NEED_GOT_RELOC, NEED_PLT_RELOC): Provide default
definitions.
(TARGET_CALLEE_INTERWORKING): Fix typo in comment.
(TARGET_SWITCHES): Add -m{no-}single-pic-base.
(TARGET_OPTIONS): Add -mpic-register=N.
(OUTPUT_INT_ADDR_CONST): New macro.
(INDEX_REGISTER_RTX_P, PIC_OFFSET_TABLE_REGNUM, FINALIZE_PIC,
LEGITIMATE_PIC_OPERAND_P): Likewise.
(LEGITIMIZE_ADDRESS, GOT_IF_LEGITIMATE_ADDRESS): Support PIC.
(ASM_OUTPUT_INT): Use OUTPUT_INT_ADDR_CONST rather than calling
output_addr_const directly.
(PRINT_OPERAND_PUNCT_VALID_P): Accept `|' for compatibility with
ARM port.
(thumb_pic_register, thumb_pic_register_string): Declare.
* config/arm/thumb.c (symbol_mentioned_p): New function: Imported
from arm.c.
(label_mentioned_p): New function: Imported from arm.c.
(legitimize_pic_address): New function: Imported from arm.c.
(is_pic):New function: Imported from arm.c.
(thumb_finalize_pic):New function: Imported from arm.c.
(add_constant): Cope with PIC constants.
(fixit): Cope with PIC constants.
(output_return): Do not treat the PIC register as live if
TARGET_SINGLE_PIC_BASE is true.
(thumb_function_prologue): Do not treat the PIC register as live if
TARGET_SINGLE_PIC_BASE is true.
(thumb_expand_prologue): Do not treat the PIC register as live if
TARGET_SINGLE_PIC_BASE is true.
(thumb_unexpand_epilogue): Do not treat the PIC register as live if
TARGET_SINGLE_PIC_BASE is true.
(thumb_print_operand): Accept '|'.
(thumb_override_options): Process PIC options.
* config/arm/thumb.md (movsi): Support PIC.
(call_insn): Change "i" constraint to "X".
(call_value_insn): Likewise.
(consttable_4, consttable_8, consttable_end): Set and clear
"making_const_table" as appropriate.
(pic_load_addr, pic_add_dot_plus_four): New insns.
* invoke.texi (Thumb Options): Fix spelling. Document new
options -msingle-pic-base and -mpic-register=.
1999-07-26 Andrew Haley <aph@cygnus.com> 1999-07-26 Andrew Haley <aph@cygnus.com>
* config/m32r/initfini.c (__init): Use a full word immediate for * config/m32r/initfini.c (__init): Use a full word immediate for
......
...@@ -59,6 +59,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -59,6 +59,7 @@ Boston, MA 02111-1307, USA. */
#define THUMB_FLAG_BACKTRACE 0x0002 #define THUMB_FLAG_BACKTRACE 0x0002
#define THUMB_FLAG_LEAF_BACKTRACE 0x0004 #define THUMB_FLAG_LEAF_BACKTRACE 0x0004
#define ARM_FLAG_THUMB 0x1000 /* same as in arm.h */ #define ARM_FLAG_THUMB 0x1000 /* same as in arm.h */
#define THUMB_FLAG_SINGLE_PIC_BASE 0x4000 /* same as in arm.h */
#define THUMB_FLAG_CALLEE_SUPER_INTERWORKING 0x40000 #define THUMB_FLAG_CALLEE_SUPER_INTERWORKING 0x40000
#define THUMB_FLAG_CALLER_SUPER_INTERWORKING 0x80000 #define THUMB_FLAG_CALLER_SUPER_INTERWORKING 0x80000
...@@ -71,8 +72,17 @@ extern int target_flags; ...@@ -71,8 +72,17 @@ extern int target_flags;
#define TARGET_BACKTRACE (leaf_function_p() \ #define TARGET_BACKTRACE (leaf_function_p() \
? (target_flags & THUMB_FLAG_LEAF_BACKTRACE) \ ? (target_flags & THUMB_FLAG_LEAF_BACKTRACE) \
: (target_flags & THUMB_FLAG_BACKTRACE)) : (target_flags & THUMB_FLAG_BACKTRACE))
#define TARGET_SINGLE_PIC_BASE (target_flags & THUMB_FLAG_SINGLE_PIC_BASE)
/* Set if externally visable functions should assume that they #ifndef GOT_PCREL
#define GOT_PCREL 0
#endif
#ifndef NEED_GOT_RELOC
#define NEED_GOT_RELOC 1
#endif
/* Set if externally visible functions should assume that they
might be called in ARM mode, from a non-thumb aware code. */ might be called in ARM mode, from a non-thumb aware code. */
#define TARGET_CALLEE_INTERWORKING \ #define TARGET_CALLEE_INTERWORKING \
(target_flags & THUMB_FLAG_CALLEE_SUPER_INTERWORKING) (target_flags & THUMB_FLAG_CALLEE_SUPER_INTERWORKING)
...@@ -101,6 +111,9 @@ extern int target_flags; ...@@ -101,6 +111,9 @@ extern int target_flags;
{"no-callee-super-interworking", -THUMB_FLAG_CALLEE_SUPER_INTERWORKING}, \ {"no-callee-super-interworking", -THUMB_FLAG_CALLEE_SUPER_INTERWORKING}, \
{"caller-super-interworking", THUMB_FLAG_CALLER_SUPER_INTERWORKING}, \ {"caller-super-interworking", THUMB_FLAG_CALLER_SUPER_INTERWORKING}, \
{"no-caller-super-interworking", -THUMB_FLAG_CALLER_SUPER_INTERWORKING}, \ {"no-caller-super-interworking", -THUMB_FLAG_CALLER_SUPER_INTERWORKING}, \
{"single-pic-base", THUMB_FLAG_SINGLE_PIC_BASE, \
"Do not load the PIC register in function prologues" }, \
{"no-single-pic-base", -THUMB_FLAG_SINGLE_PIC_BASE, "" }, \
SUBTARGET_SWITCHES \ SUBTARGET_SWITCHES \
{"", TARGET_DEFAULT} \ {"", TARGET_DEFAULT} \
} }
...@@ -108,6 +121,8 @@ extern int target_flags; ...@@ -108,6 +121,8 @@ extern int target_flags;
#define TARGET_OPTIONS \ #define TARGET_OPTIONS \
{ \ { \
{ "structure-size-boundary=", & structure_size_string }, \ { "structure-size-boundary=", & structure_size_string }, \
{ "pic-register=", & thumb_pic_register_string, \
"Specify the register to be used for PIC addressing" } \
} }
#define REGISTER_PREFIX "" #define REGISTER_PREFIX ""
...@@ -170,7 +185,7 @@ extern int target_flags; ...@@ -170,7 +185,7 @@ extern int target_flags;
#define ASM_OUTPUT_INT(STREAM,VALUE) \ #define ASM_OUTPUT_INT(STREAM,VALUE) \
{ \ { \
fprintf (STREAM, "\t.word\t"); \ fprintf (STREAM, "\t.word\t"); \
output_addr_const (STREAM, (VALUE)); \ OUTPUT_INT_ADDR_CONST (STREAM, (VALUE)); \
fprintf (STREAM, "\n"); \ fprintf (STREAM, "\n"); \
} }
...@@ -556,6 +571,9 @@ enum reg_class ...@@ -556,6 +571,9 @@ enum reg_class
((REGNO) < 8 \ ((REGNO) < 8 \
|| (unsigned) reg_renumber[REGNO] < 8) || (unsigned) reg_renumber[REGNO] < 8)
#define INDEX_REGISTER_RTX_P(X) \
(GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
/* ??? This looks suspiciously wrong. */ /* ??? This looks suspiciously wrong. */
/* We need to leave BASE_REGS reloads alone, in order to avoid caller_save /* We need to leave BASE_REGS reloads alone, in order to avoid caller_save
lossage. Caller_saves requests a BASE_REGS reload (caller_save_spill_class) lossage. Caller_saves requests a BASE_REGS reload (caller_save_spill_class)
...@@ -633,6 +651,9 @@ int thumb_shiftable_const (); ...@@ -633,6 +651,9 @@ int thumb_shiftable_const ();
#define STATIC_CHAIN_REGNUM 9 #define STATIC_CHAIN_REGNUM 9
/* Define this if the program counter is overloaded on a register. */
#define PC_REGNUM 15
#define FRAME_POINTER_REQUIRED 0 #define FRAME_POINTER_REQUIRED 0
#define ELIMINABLE_REGS \ #define ELIMINABLE_REGS \
...@@ -798,6 +819,39 @@ int thumb_shiftable_const (); ...@@ -798,6 +819,39 @@ int thumb_shiftable_const ();
} }
/* Position Independent Code. */
/* We decide which register to use based on the compilation options and
the assembler in use. @@@ Actually, we don't currently for Thumb. */
extern int thumb_pic_register;
/* The register number of the register used to address a table of static
data addresses in memory. */
#define PIC_OFFSET_TABLE_REGNUM thumb_pic_register
#define FINALIZE_PIC thumb_finalize_pic ()
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. */
#define LEGITIMATE_PIC_OPERAND_P(X) \
(! symbol_mentioned_p (X) \
&& (! CONSTANT_POOL_ADDRESS_P (X) \
|| ! symbol_mentioned_p (get_pool_constant (X))))
/* We need to know when we are making a constant pool; this determines
whether data needs to be in the GOT or can be referenced via a GOT
offset. */
extern int making_const_table;
#define CONDITIONAL_REGISTER_USAGE \
{ \
if (flag_pic) \
{ \
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0; \
} \
}
/* Implicit Calls to Library Routines */ /* Implicit Calls to Library Routines */
#define TARGET_MEM_FUNCTIONS 1 #define TARGET_MEM_FUNCTIONS 1
...@@ -884,7 +938,7 @@ int thumb_shiftable_const (); ...@@ -884,7 +938,7 @@ int thumb_shiftable_const ();
goto WIN; \ goto WIN; \
/* This is PC relative data before MACHINE_DEPENDENT_REORG runs. */ \ /* This is PC relative data before MACHINE_DEPENDENT_REORG runs. */ \
else if (GET_MODE_SIZE (MODE) >= 4 && CONSTANT_P (X) \ else if (GET_MODE_SIZE (MODE) >= 4 && CONSTANT_P (X) \
&& CONSTANT_POOL_ADDRESS_P (X)) \ && CONSTANT_POOL_ADDRESS_P (X) && ! flag_pic) \
goto WIN; \ goto WIN; \
/* This is PC relative data after MACHINE_DEPENDENT_REORG runs. */ \ /* This is PC relative data after MACHINE_DEPENDENT_REORG runs. */ \
else if (GET_MODE_SIZE (MODE) >= 4 && reload_completed \ else if (GET_MODE_SIZE (MODE) >= 4 && reload_completed \
...@@ -955,6 +1009,12 @@ int thumb_shiftable_const (); ...@@ -955,6 +1009,12 @@ int thumb_shiftable_const ();
&& (INTVAL (XEXP (X, 1)) & 3) == 0) \ && (INTVAL (XEXP (X, 1)) & 3) == 0) \
goto WIN; \ goto WIN; \
} \ } \
else if (GET_MODE_CLASS (MODE) != MODE_FLOAT \
&& GET_CODE (X) == SYMBOL_REF \
&& CONSTANT_POOL_ADDRESS_P (X) \
&& ! (flag_pic \
&& symbol_mentioned_p (get_pool_constant (X)))) \
goto WIN; \
} }
/* ??? If an HImode FP+large_offset address is converted to an HImode /* ??? If an HImode FP+large_offset address is converted to an HImode
...@@ -985,7 +1045,10 @@ int thumb_shiftable_const (); ...@@ -985,7 +1045,10 @@ int thumb_shiftable_const ();
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) extern struct rtx_def * legitimize_pic_address ();
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
if (flag_pic) \
(X) = legitimize_pic_address (OLDX, MODE, NULL_RTX);
#define LEGITIMATE_CONSTANT_P(X) \ #define LEGITIMATE_CONSTANT_P(X) \
(GET_CODE (X) == CONST_INT \ (GET_CODE (X) == CONST_INT \
...@@ -1078,6 +1141,28 @@ int thumb_shiftable_const (); ...@@ -1078,6 +1141,28 @@ int thumb_shiftable_const ();
/* Position Independent Code */ /* Position Independent Code */
extern const char * thumb_pic_register_string;
extern int thumb_pic_register;
/* The register number of the register used to address a table of static
data addresses in memory. */
#define PIC_OFFSET_TABLE_REGNUM thumb_pic_register
#define FINALIZE_PIC thumb_finalize_pic ()
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. */
#define LEGITIMATE_PIC_OPERAND_P(X) \
(! symbol_mentioned_p (X) \
&& (! CONSTANT_POOL_ADDRESS_P (X) \
|| ! symbol_mentioned_p (get_pool_constant (X))))
/* We need to know when we are making a constant pool; this determines
whether data needs to be in the GOT or can be referenced via a GOT
offset. */
extern int making_const_table;
#define PRINT_OPERAND(STREAM,X,CODE) \ #define PRINT_OPERAND(STREAM,X,CODE) \
thumb_print_operand((STREAM), (X), (CODE)) thumb_print_operand((STREAM), (X), (CODE))
...@@ -1102,7 +1187,33 @@ int thumb_shiftable_const (); ...@@ -1102,7 +1187,33 @@ int thumb_shiftable_const ();
output_addr_const ((STREAM), (X)); \ output_addr_const ((STREAM), (X)); \
} }
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '@' || ((CODE) == '_')) /* Handles PIC addr specially */
#define OUTPUT_INT_ADDR_CONST(STREAM,X) \
{ \
if (flag_pic && GET_CODE(X) == CONST && is_pic(X)) \
{ \
output_addr_const(STREAM, XEXP (XEXP (XEXP (X, 0), 0), 0)); \
fputs(" - (", STREAM); \
output_addr_const(STREAM, XEXP (XEXP (XEXP (X, 0), 1), 0)); \
fputs(")", STREAM); \
} \
else output_addr_const(STREAM, X); \
\
/* Mark symbols as position independent. We only do this in the \
.text segment, not in the .data segment. */ \
if (NEED_GOT_RELOC && flag_pic && making_const_table && \
(GET_CODE(X) == SYMBOL_REF || GET_CODE(X) == LABEL_REF)) \
{ \
if (GET_CODE(X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P(X)) \
fprintf(STREAM, "(GOTOFF)"); \
else if (GET_CODE (X) == LABEL_REF) \
fprintf(STREAM, "(GOTOFF)"); \
else \
fprintf(STREAM, "(GOT)"); \
} \
}
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '@' || ((CODE) == '_') || ((CODE) == '|'))
/* Emit a special directive when defining a function name. /* Emit a special directive when defining a function name.
This is used by the assembler to assit with interworking. */ This is used by the assembler to assit with interworking. */
......
...@@ -43,6 +43,11 @@ ...@@ -43,6 +43,11 @@
if (GET_CODE (operands[0]) != REG) if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (SImode, operands[1]); operands[1] = force_reg (SImode, operands[1]);
} }
if (CONSTANT_P (operands[1]) && flag_pic)
operands[1] = legitimize_pic_address (operands[1], SImode,
((reload_in_progress
|| reload_completed)
? operands[0] : 0));
") ")
(define_insn "*movsi_insn" (define_insn "*movsi_insn"
...@@ -1051,7 +1056,7 @@ ...@@ -1051,7 +1056,7 @@
(define_insn "*call_insn" (define_insn "*call_insn"
[(call (mem:SI (match_operand:SI 0 "" "i")) [(call (mem:SI (match_operand:SI 0 "" "X"))
(match_operand:SI 1 "" ""))] (match_operand:SI 1 "" ""))]
"GET_CODE (operands[0]) == SYMBOL_REF" "GET_CODE (operands[0]) == SYMBOL_REF"
"bl\\t%a0" "bl\\t%a0"
...@@ -1059,7 +1064,7 @@ ...@@ -1059,7 +1064,7 @@
(define_insn "*call_value_insn" (define_insn "*call_value_insn"
[(set (match_operand 0 "register_operand" "=l") [(set (match_operand 0 "register_operand" "=l")
(call (mem:SI (match_operand 1 "" "i")) (call (mem:SI (match_operand 1 "" "X"))
(match_operand 2 "" "")))] (match_operand 2 "" "")))]
"GET_CODE (operands[1]) == SYMBOL_REF" "GET_CODE (operands[1]) == SYMBOL_REF"
"bl\\t%a1" "bl\\t%a1"
...@@ -1110,6 +1115,7 @@ ...@@ -1110,6 +1115,7 @@
"" ""
"* "*
{ {
making_const_table = TRUE;
switch (GET_MODE_CLASS (GET_MODE (operands[0]))) switch (GET_MODE_CLASS (GET_MODE (operands[0])))
{ {
case MODE_FLOAT: case MODE_FLOAT:
...@@ -1132,6 +1138,7 @@ ...@@ -1132,6 +1138,7 @@
"" ""
"* "*
{ {
making_const_table = TRUE;
switch (GET_MODE_CLASS (GET_MODE (operands[0]))) switch (GET_MODE_CLASS (GET_MODE (operands[0])))
{ {
case MODE_FLOAT: case MODE_FLOAT:
...@@ -1153,7 +1160,7 @@ ...@@ -1153,7 +1160,7 @@
[(unspec_volatile [(const_int 0)] 4)] [(unspec_volatile [(const_int 0)] 4)]
"" ""
"* "*
/* Nothing to do (currently). */ making_const_table = FALSE;
return \"\"; return \"\";
") ")
...@@ -1164,3 +1171,26 @@ ...@@ -1164,3 +1171,26 @@
assemble_align (32); assemble_align (32);
return \"\"; return \"\";
") ")
/* When generating pic, we need to load the symbol offset into a register.
So that the optimizer does not confuse this with a normal symbol load
we use an unspec. The offset will be loaded from a constant pool entry,
since that is the only type of relocation we can use. */
(define_insn "pic_load_addr"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand 1 "" "")] 3))]
"flag_pic"
"ldr\\t%0, %a1")
(define_insn "pic_add_dot_plus_four"
[(set (match_operand 0 "register_operand" "+r")
(plus:SI (match_dup 0) (const (plus:SI (pc) (const_int 4)))))
(use (label_ref (match_operand 1 "" "")))]
"flag_pic"
"*
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\",
CODE_LABEL_NUMBER (operands[1]));
return \"add\\t%0, %|pc\";
")
...@@ -276,6 +276,8 @@ in the following sections. ...@@ -276,6 +276,8 @@ in the following sections.
-mnop-fun-dllimport -mno-nop-fun-dllimport -mnop-fun-dllimport -mno-nop-fun-dllimport
-mcallee-super-interworking -mno-callee-super-interworking -mcallee-super-interworking -mno-callee-super-interworking
-mcaller-super-interworking -mno-caller-super-interworking -mcaller-super-interworking -mno-caller-super-interworking
-msingle-pic-base -mno-single-pic-base
-mpic-register=
@emph{MN10200 Options} @emph{MN10200 Options}
-mrelax -mrelax
...@@ -4395,7 +4397,7 @@ Generate code for a processor running in big-endian mode. ...@@ -4395,7 +4397,7 @@ Generate code for a processor running in big-endian mode.
@item -mstructure-size-boundary=<n> @item -mstructure-size-boundary=<n>
@kindex -mstructure-size-boundary @kindex -mstructure-size-boundary
The size of all structures and unions will be rounded up to a multiple The size of all structures and unions will be rounded up to a multiple
of the number of bits set by this option. Permissable values are 8 and of the number of bits set by this option. Permissible values are 8 and
32. The default value varies for different toolchains. For the COFF 32. The default value varies for different toolchains. For the COFF
targeted toolchain the default value is 8. Specifying the larger number targeted toolchain the default value is 8. Specifying the larger number
can produced faster, more efficient code, but can also increase the size can produced faster, more efficient code, but can also increase the size
...@@ -4421,7 +4423,18 @@ non-interworking code. ...@@ -4421,7 +4423,18 @@ non-interworking code.
Allows calls via function pointers (including virtual functions) to Allows calls via function pointers (including virtual functions) to
execute correctly regardless of whether the target code has been execute correctly regardless of whether the target code has been
compiled for interworking or not. There is a small overhead in the cost compiled for interworking or not. There is a small overhead in the cost
of executing a funciton pointer if this option is enabled. of executing a function pointer if this option is enabled.
@item -msingle-pic-base
@kindex -msingle-pic-base
Treat the register used for PIC addressing as read-only, rather than
loading it in the prologue for each function. The run-time system is
responsible for initialising this register with an appropriate value
before execution begins.
@item -mpic-register=<reg>
@kindex -mpic-register=
Specify the register to be used for PIC addressing. The default is R10.
@end table @end table
......
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