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riscv-gcc-1
Commit 4b9580a5 by J"orn Rennecke Committed by Joern Rennecke
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sh-protos.h (reg_no_subreg_operand, [...]): Don't declare. 

	* sh-protos.h (reg_no_subreg_operand, emit_fpscr_use): Don't declare.
	(fp_extended_operand, emit_fpscr_use): Likewise.
	* sh.c (reg_no_subreg_operand, fp_extended_operand): Delete functions.
	(fpul_operand): New function.
	* sh.h (PREDICATE_CODES): Remove reg_no_subreg_operand and
	fp_extended_operand.  Add fpul_operand.
	* sh.md (mulsf3, mulsf3_i4): Use fp_arith_reg_operand for "f" operands.
	(mulsf3_ie, macsf3, cmpgtsf_t, cmpeqsf_t, ieee_ccmpeqsf_t): Likewise.
	(cmpgtsf_t_i4, cmpeqsf_t_i4, ieee_ccmpeqsf_t_4, negsf2): Likewise.
	(negsf2_i, sqrtsf2, sqrtsf2_i, abssf2, abssf2_i, adddf3): Likewise.
	(adddf3_i, subdf3, subdf3_i, muldf3, muldf3_i, divdf3): Likewise.
	(divdf3_i): Likewise.
	(floatsisf2): Likewise.  Use fpul_operand for 'y' operand.
	(floatsisf2_i4, floatsisf2_ie, fix_truncsfsi2): Likewise.
	(fix_truncsfsi2_i4, fixsfsi, floatsidf2, floatsidf2_i): Likewise.
	(fix_truncdfsi2, fix_truncdfsi2_i, extendsfdf2): Likewise.
	(extendsfdf2_i4, truncdfsf2, truncdfsf2_i4): Likewise.

From-SVN: r37158
parent 89b78169
Showing with 30 additions and 46 deletions
gcc/ChangeLog
Tue Oct 31 15:33:27 2000 J"orn Rennecke <amylaar@redhat.com>
* sh-protos.h (reg_no_subreg_operand, emit_fpscr_use): Don't declare.
(fp_extended_operand, emit_fpscr_use): Likewise.
* sh.c (reg_no_subreg_operand, fp_extended_operand): Delete functions.
(fpul_operand): New function.
* sh.h (PREDICATE_CODES): Remove reg_no_subreg_operand and
fp_extended_operand. Add fpul_operand.
* sh.md (mulsf3, mulsf3_i4): Use fp_arith_reg_operand for "f" operands.
(mulsf3_ie, macsf3, cmpgtsf_t, cmpeqsf_t, ieee_ccmpeqsf_t): Likewise.
(cmpgtsf_t_i4, cmpeqsf_t_i4, ieee_ccmpeqsf_t_4, negsf2): Likewise.
(negsf2_i, sqrtsf2, sqrtsf2_i, abssf2, abssf2_i, adddf3): Likewise.
(adddf3_i, subdf3, subdf3_i, muldf3, muldf3_i, divdf3): Likewise.
(divdf3_i): Likewise.
(floatsisf2): Likewise. Use fpul_operand for 'y' operand.
(floatsisf2_i4, floatsisf2_ie, fix_truncsfsi2): Likewise.
(fix_truncsfsi2_i4, fixsfsi, floatsidf2, floatsidf2_i): Likewise.
(fix_truncdfsi2, fix_truncdfsi2_i, extendsfdf2): Likewise.
(extendsfdf2_i4, truncdfsf2, truncdfsf2_i4): Likewise.
2000-10-31 Bernd Schmidt <bernds@redhat.co.uk>
* config/i386/i386.c (ix86_init_builtins): Correct return type
......
gcc/config/sh/sh-protos.h
......@@ -81,9 +81,7 @@ extern int system_reg_operand PARAMS ((rtx, enum machine_mode));
extern int general_movsrc_operand PARAMS ((rtx, enum machine_mode));
extern int general_movdst_operand PARAMS ((rtx, enum machine_mode));
extern int arith_reg_operand PARAMS ((rtx, enum machine_mode));
extern int reg_no_subreg_operand PARAMS ((rtx, enum machine_mode));
extern int fp_arith_reg_operand PARAMS ((rtx, enum machine_mode));
extern int fp_extended_operand PARAMS ((rtx, enum machine_mode));
extern int arith_operand PARAMS ((rtx, enum machine_mode));
extern int arith_reg_or_0_operand PARAMS ((rtx, enum machine_mode));
extern int logical_operand PARAMS ((rtx, enum machine_mode));
......@@ -120,7 +118,6 @@ extern void sh_expand_epilogue PARAMS ((void));
extern int sh_need_epilogue PARAMS ((void));
extern void function_epilogue PARAMS ((FILE *, int));
extern int initial_elimination_offset PARAMS ((int, int));
extern void emit_fpscr_use PARAMS ((void));
extern int fldi_ok PARAMS ((void));
#ifdef HARD_CONST
......
gcc/config/sh/sh.c
......@@ -4659,20 +4659,6 @@ general_movdst_operand (op, mode)
return general_operand (op, mode);
}
/* Accept a register, but not a subreg of any kind. This allows us to
avoid pathological cases in reload wrt data movement common in
int->fp conversion. */
int
reg_no_subreg_operand (op, mode)
register rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) == SUBREG)
return 0;
return register_operand (op, mode);
}
/* Returns 1 if OP is a normal arithmetic register. */
int
......@@ -4720,33 +4706,6 @@ fp_arith_reg_operand (op, mode)
return 0;
}
int
fp_extended_operand (op, mode)
rtx op;
enum machine_mode mode;
{
if (GET_CODE (op) == FLOAT_EXTEND && GET_MODE (op) == mode)
{
op = XEXP (op, 0);
mode = GET_MODE (op);
}
if (register_operand (op, mode))
{
int regno;
if (GET_CODE (op) == REG)
regno = REGNO (op);
else if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
regno = REGNO (SUBREG_REG (op));
else
return 1;
return (regno != T_REG && regno != PR_REG && regno > 15
&& regno != MACH_REG && regno != MACL_REG);
}
return 0;
}
/* Returns 1 if OP is a valid source operand for an arithmetic insn. */
int
......@@ -4857,6 +4816,15 @@ fpscr_operand (op, mode)
}
int
fpul_operand (op, mode)
rtx op;
{
return (GET_CODE (op) == REG
&& (REGNO (op) == FPUL_REG || REGNO (op) >= FIRST_PSEUDO_REGISTER)
&& GET_MODE (op) == mode);
}
int
commutative_float_operator (op, mode)
rtx op;
enum machine_mode mode;
......
gcc/config/sh/sh.h
......@@ -2231,13 +2231,12 @@ extern struct rtx_def *fpscr_rtx;
#define PREDICATE_CODES \
{"arith_operand", {SUBREG, REG, CONST_INT}}, \
{"arith_reg_operand", {SUBREG, REG}}, \
{"reg_no_subreg_operand", {REG}}, \
{"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
{"binary_float_operator", {PLUS, MULT}}, \
{"commutative_float_operator", {PLUS, MULT}}, \
{"fp_arith_reg_operand", {SUBREG, REG}}, \
{"fp_extended_operand", {SUBREG, REG, FLOAT_EXTEND}}, \
{"fpscr_operand", {REG}}, \
{"fpul_operand", {REG}}, \
{"general_movsrc_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE, MEM}}, \
{"general_movdst_operand", {SUBREG, REG, MEM}}, \
{"logical_operand", {SUBREG, REG, CONST_INT}}, \
......
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