Commit 4b632bf1 by Richard Earnshaw Committed by Richard Earnshaw

arm.c (arm_split_constant): Don't try to force a constant to memory after arm_reorg has run.

* arm.c (arm_split_constant): Don't try to force a constant to
memory after arm_reorg has run.
(after_arm_reorg): New static variable.
(arm_reorg): Set it.
(output_func_epilogue): Clear it.

From-SVN: r25742
parent 4995028c
Sat Mar 13 11:36:16 1999 Richard Earnshaw (rearnsha@arm.com)
* arm.c (arm_split_constant): Don't try to force a constant to
memory after arm_reorg has run.
(after_arm_reorg): New static variable.
(arm_reorg): Set it.
(output_func_epilogue): Clear it.
Fri Mar 12 20:26:32 1999 David Edelsohn <edelsohn@mhpcc.edu> Fri Mar 12 20:26:32 1999 David Edelsohn <edelsohn@mhpcc.edu>
* configure.in ({rs6000,powerpc}-ibm-aix*): Set float_format to none. * configure.in ({rs6000,powerpc}-ibm-aix*): Set float_format to none.
......
...@@ -128,6 +128,8 @@ int lr_save_eliminated; ...@@ -128,6 +128,8 @@ int lr_save_eliminated;
static int return_used_this_function; static int return_used_this_function;
static int after_arm_reorg = 0;
static int arm_constant_limit = 3; static int arm_constant_limit = 3;
/* For an explanation of these variables, see final_prescan_insn below. */ /* For an explanation of these variables, see final_prescan_insn below. */
...@@ -604,8 +606,15 @@ arm_split_constant (code, mode, val, target, source, subtargets) ...@@ -604,8 +606,15 @@ arm_split_constant (code, mode, val, target, source, subtargets)
|| (GET_CODE (target) == REG && GET_CODE (source) == REG || (GET_CODE (target) == REG && GET_CODE (source) == REG
&& REGNO (target) != REGNO (source))) && REGNO (target) != REGNO (source)))
{ {
if (arm_gen_constant (code, mode, val, target, source, 1, 0) /* After arm_reorg has been called, we can't fix up expensive
> arm_constant_limit + (code != SET)) constants by pushing them into memory so we must synthesise
them in-line, regardless of the cost. This is only likely to
be more costly on chips that have load delay slots and we are
compiling without running the scheduler (so no splitting
occurred before the final instruction emission. */
if (! after_arm_reorg
&& (arm_gen_constant (code, mode, val, target, source, 1, 0)
> arm_constant_limit + (code != SET)))
{ {
if (code == SET) if (code == SET)
{ {
...@@ -4022,6 +4031,8 @@ arm_reorg (first) ...@@ -4022,6 +4031,8 @@ arm_reorg (first)
insn = scan; insn = scan;
} }
} }
after_arm_reorg = 1;
} }
...@@ -5378,7 +5389,9 @@ output_func_epilogue (f, frame_size) ...@@ -5378,7 +5389,9 @@ output_func_epilogue (f, frame_size)
epilogue_done: epilogue_done:
/* Reset the ARM-specific per-function variables. */
current_function_anonymous_args = 0; current_function_anonymous_args = 0;
after_arm_reorg = 0;
} }
static void static void
......
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