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Commit 4b39d801 by Peter Bergner
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rs6000: Fix testsuite fallout from previous fix. [PR93136] 

The fix for PR target/92923 exposed some test cases with fragile
scan-assembler-times counting.  Split the test cases into smaller
functions, which allows less chance of optimizations causing slight
instruction count numbers.

gcc/testsuite/
	PR target/93136
	* gcc.dg/vmx/ops.c: Add -flax-vector-conversions to dg-options.
	* gcc.target/powerpc/vsx-vector-6.h: Split tests into smaller functions.
	* gcc.target/powerpc/vsx-vector-6.p7.c: Adjust scan-assembler-times
	regex directives.  Adjust expected instruction counts.
	* gcc.target/powerpc/vsx-vector-6.p8.c: Likewise.
	* gcc.target/powerpc/vsx-vector-6.p9.c: Likewise.
parent b780f68e
Showing with 269 additions and 272 deletions
gcc/testsuite/ChangeLog
2020-02-08 Peter Bergner <bergner@linux.ibm.com>
PR target/93136
* gcc.dg/vmx/ops.c: Add -flax-vector-conversions to dg-options.
* gcc.target/powerpc/vsx-vector-6.h: Split tests into smaller functions.
* gcc.target/powerpc/vsx-vector-6.p7.c: Adjust scan-assembler-times
regex directives. Adjust expected instruction counts.
* gcc.target/powerpc/vsx-vector-6.p8.c: Likewise.
* gcc.target/powerpc/vsx-vector-6.p9.c: Likewise.
2020-02-08 Jakub Jelinek <jakub@redhat.com> 2020-02-08 Jakub Jelinek <jakub@redhat.com>
PR c++/93549 PR c++/93549
......
gcc/testsuite/gcc.dg/vmx/ops.c
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mno-vsx -Wno-deprecated" } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mno-vsx -Wno-deprecated -flax-vector-conversions" } */
#include <altivec.h> #include <altivec.h>
#include <stdlib.h> #include <stdlib.h>
extern char * *var_char_ptr; extern char * *var_char_ptr;
......
gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c
/* { dg-do compile { target { lp64 && be } } } */ /* { dg-do compile { target lp64 } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-mvsx -O2 -mdejagnu-cpu=power7 -dp" } */ /* { dg-options "-O2 -mdejagnu-cpu=power7" } */
/* Expected instruction counts for Power 7 */
/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
/* { dg-final { scan-assembler-times "xxlnor" 5 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 5 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */
/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
/* { dg-final { scan-assembler-times "vperm" 2 } } */
/* { dg-final { scan-assembler-times "xvrdpic" 2 } } */
/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
/* { dg-final { scan-assembler-times "vmsumshs" 2 } } */
/* { dg-final { scan-assembler-times "xxland" 13 } } */
/* { dg-final { scan-assembler-times "xxlxor" 2 } } */
/* { dg-final { scan-assembler-times "xxsel" 4 } } */
/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
/* { dg-final { scan-assembler-times "xvrdpi" 7 } } */
/* Source code for the test in vsx-vector-6.h */ /* Source code for the test in vsx-vector-6.h */
#include "vsx-vector-6.h" #include "vsx-vector-6.h"
/* { dg-final { scan-assembler-times {\mvmaxub\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvmsumshs\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvmsumuhs\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvperm\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvabsdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvadddp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\M} 9 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\M} 10 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\M} 10 } } */
/* { dg-final { scan-assembler-times {\mxvdivdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmadd[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmadd[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmsub[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmsub[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmuldp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmadd[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmadd[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmsub[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmsub[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpi\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpic\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpip\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrspiz\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvsubdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxxland\M} 3 } } */
/* { dg-final { scan-assembler-times {\mxxlandc\M} 13 } } */
/* { dg-final { scan-assembler-times {\mxxlnor\M} 5 } } */
/* { dg-final { scan-assembler-times {\mxxlor\M} 9 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 3 } } */
/* { dg-final { scan-assembler-times {\mxxsel\M} 2 } } */
gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c
/* { dg-do compile { target lp64 } } */ /* { dg-do compile { target lp64 } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-mvsx -O2 -mdejagnu-cpu=power8" } */ /* { dg-options "-O2 -mdejagnu-cpu=power8" } */
/* Expected instruction counts for Power 8. */
/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
/* { dg-final { scan-assembler-times "xxlnor" 6 { target le } } } */
/* { dg-final { scan-assembler-times "xxlnor" 5 { target be } } } */
/* We generate xxlor instructions for many reasons other than or'ing vector
operands or calling __builtin_vec_or(), which means we cannot rely on
their usage counts being stable. Therefore, we just ensure at least one
xxlor instruction was generated. */
/* { dg-final { scan-assembler "xxlor" } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\s} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\.\s} 5 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\s} 2 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\.\s} 6 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 2 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 4 } } */
/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
/* { dg-final { scan-assembler-times "vperm" 1 } } */
/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
/* { dg-final { scan-assembler-times "xxland" 13 } } */
/* { dg-final { scan-assembler-times "xxlxor" 2 } } */
/* { dg-final { scan-assembler-times "xxsel" 2 } } */
/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */
/* Source code for the test in vsx-vector-6.h */ /* Source code for the test in vsx-vector-6.h */
#include "vsx-vector-6.h" #include "vsx-vector-6.h"
/* { dg-final { scan-assembler-times {\mvmaxub\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvmsumshs\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvmsumuhs\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvperm\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvabsdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvadddp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\M} 9 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\M} 10 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\M} 10 } } */
/* { dg-final { scan-assembler-times {\mxvdivdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmadd[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmadd[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmsub[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmsub[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmuldp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmadd[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmadd[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmsub[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmsub[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpi\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpic\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpip\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrspiz\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvsubdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxxland\M} 3 } } */
/* { dg-final { scan-assembler-times {\mxxlandc\M} 13 } } */
/* { dg-final { scan-assembler-times {\mxxlnor\M} 5 } } */
/* { dg-final { scan-assembler-times {\mxxlor\M} 9 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 3 } } */
/* { dg-final { scan-assembler-times {\mxxsel\M} 2 } } */
gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c
/* { dg-do compile { target lp64 } } */ /* { dg-do compile { target lp64 } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-mvsx -O2 -mdejagnu-cpu=power9" } */ /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
/* Expected instruction counts for Power9. */
/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
/* { dg-final { scan-assembler-times "xxlnor" 5 } } */
/* We generate xxlor instructions for many reasons other than or'ing vector
operands or calling __builtin_vec_or(), which means we cannot rely on
their usage counts being stable. Therefore, we just ensure at least one
xxlor instruction was generated. */
/* { dg-final { scan-assembler "xxlor" } } */
/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 } } */
/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
/* { dg-final { scan-assembler-times "xvcmpgedp" 8 } } */
/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
/* { dg-final { scan-assembler-times "vperm" 1 } } */
/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
/* { dg-final { scan-assembler-times "xxland" 13 } } */
/* Source code for the test in vsx-vector-6.h */ /* Source code for the test in vsx-vector-6.h */
#include "vsx-vector-6.h" #include "vsx-vector-6.h"
/* { dg-final { scan-assembler-times {\mvmaxub\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvmsumshs\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvmsumuhs\M} 1 } } */
/* { dg-final { scan-assembler-times {\mvpermr?\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvabsdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvadddp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvcmpeqdp\M} 9 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgedp\M} 10 } } */
/* { dg-final { scan-assembler-times {\mxvcmpgtdp\M} 10 } } */
/* { dg-final { scan-assembler-times {\mxvdivdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmadd[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmadd[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmsub[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmuldp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmadd[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmadd[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmsub[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvnmsub[am]sp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpi\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpic\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpip\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvrspiz\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxvmsub[am]dp\M} 1 } } */
/* { dg-final { scan-assembler-times {\mxxland\M} 3 } } */
/* { dg-final { scan-assembler-times {\mxxlandc\M} 13 } } */
/* { dg-final { scan-assembler-times {\mxxlnor\M} 5 } } */
/* { dg-final { scan-assembler-times {\mxxlor\M} 9 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 3 } } */
/* { dg-final { scan-assembler-times {\mxxsel\M} 2 } } */
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