[ARC] Don't use drsub* instructions when selecting fpuda.

The double precision floating point assist instructions are not
implementing the reverse double subtract instruction (drsub) found in
the FPX extension.

gcc/
2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (cpu_facility): Add fpx variant.
	(subdf3): Prohibit use reverse sub when assist operations option
	is enabled.
	* config/arc/fpx.md (subdf3_insn, *dsubh_peep2_insn): Allow drsub
	instructions only when FPX is enabled.
        * testsuite/gcc.target/arc/trsub.c: New test.

From-SVN: r235562

gcc/ChangeLog

+2016-04-28  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/arc/arc.md (cpu_facility): Add fpx variant.
+	(subdf3): Prohibit use reverse sub when assist operations option
+	is enabled.
+	* config/arc/fpx.md (subdf3_insn, *dsubh_peep2_insn): Allow drsub
+	instructions only when FPX is enabled.
+	* testsuite/gcc.target/arc/trsub.c: New test.
+
 2016-04-28  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.md (*fop_<mode>_1_mixed): Do not check for

gcc/config/arc/arc.md

@@ -270,7 +270,7 @@
 		     - get_attr_length (insn)")))
 
 ; for ARCv2 we need to disable/enable different instruction alternatives
-(define_attr "cpu_facility" "std,av1,av2"
+(define_attr "cpu_facility" "std,av1,av2,fpx"
   (const_string "std"))
 
 ; We should consider all the instructions enabled until otherwise
@@ -282,6 +282,10 @@
 	 (and (eq_attr "cpu_facility" "av2")
 	      (not (match_test "TARGET_V2")))
 	 (const_string "no")
+
+	 (and (eq_attr "cpu_facility" "fpx")
+	      (match_test "TARGET_FP_DP_AX"))
+	 (const_string "no")
 	 ]
 	(const_string "yes")))
 
@@ -5780,6 +5784,8 @@
   "
    if (TARGET_DPFP)
     {
+     if (TARGET_FP_DP_AX && (GET_CODE (operands[1]) == CONST_DOUBLE))
+       operands[1] = force_reg (DFmode, operands[1]);
      if ((GET_CODE (operands[1]) == CONST_DOUBLE)
           || GET_CODE (operands[2]) == CONST_DOUBLE)
       {

gcc/config/arc/fpx.md

@@ -304,7 +304,8 @@
      drsubh%F0%F2 0,%H1,%L1
      drsubh%F0%F2 0,%3,%L1"
   [(set_attr "type" "dpfp_addsub")
-  (set_attr "length" "4,8,4,8")])
+   (set_attr "length" "4,8,4,8")
+   (set_attr "cpu_facility" "*,*,fpx,fpx")])
 
 ;; ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;; ;; Peephole for following conversion
@@ -613,5 +614,5 @@
   drsubh%F0%F2 %H6, %H1, %L1
   drsubh%F0%F2 %H6, %3, %L1"
  [(set_attr "type" "dpfp_addsub")
-  (set_attr "length" "4,8,4,8")]
-)
+  (set_attr "length" "4,8,4,8")
+  (set_attr "cpu_facility" "*,*,fpx,fpx")])

gcc/testsuite/gcc.target/arc/trsub.c

+/* Tests if we generate rsub instructions when compiling using
+   floating point assist instructions.  */
+/* { dg-do compile } */
+/* { dg-options "-mfpu=fpuda -mcpu=arcem" } */
+
+double foo (double a)
+{
+  return ((double) 0.12 - a);
+}
+/* { dg-final { scan-assembler-not "drsub.*" } } */