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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
4a1d2a46
Commit
4a1d2a46
authored
Aug 06, 1993
by
Richard Kenner
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(PREDICATE_CODES): Add reg_or_6bit_operand to list.
From-SVN: r5089
parent
f4014bfd
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gcc/config/alpha/alpha.h
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4a1d2a46
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@@ -1697,6 +1697,7 @@ literal_section () \
#define PREDICATE_CODES \
{"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
{"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
{"add_operand", {SUBREG, REG, CONST_INT}}, \
...
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