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riscv-gcc-1
Unverified Commit 4a172be3 by Martin Liska
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Remove superfluous word in documentation. 

	PR translation/93841
	* config/or1k/or1k.opt: Remove superfluous word.
	* doc/invoke.texi: Likewise.
parent 6c39d0b7
Showing with 8 additions and 2 deletions
gcc/config/or1k/or1k.opt
...@@ -66,7 +66,7 @@ are used to perform unordered floating point compare and set flag operations. ...@@ -66,7 +66,7 @@ are used to perform unordered floating point compare and set flag operations.
mcmov mcmov
Target RejectNegative Mask(CMOV) Target RejectNegative Mask(CMOV)
Enable generation of conditional move (l.cmov) instructions. By default the Enable generation of conditional move (l.cmov) instructions. By default the
equivalent will be generated using using set and branch. equivalent will be generated using set and branch.
mror mror
Target RejectNegative Mask(ROR) Target RejectNegative Mask(ROR)
......
gcc/cp/ChangeLog
2020-02-20 Martin Liska <mliska@suse.cz> 2020-02-20 Martin Liska <mliska@suse.cz>
PR translation/93841
* config/or1k/or1k.opt: Remove superfluous word.
* doc/invoke.texi: Likewise.
2020-02-20 Martin Liska <mliska@suse.cz>
PR translation/93838 PR translation/93838
* parser.c (cp_parser_decl_specifier_seq): Remove trailing space. * parser.c (cp_parser_decl_specifier_seq): Remove trailing space.
......
gcc/doc/invoke.texi
...@@ -24907,7 +24907,7 @@ compare and set flag operations. ...@@ -24907,7 +24907,7 @@ compare and set flag operations.
@item -mcmov @item -mcmov
@opindex mcmov @opindex mcmov
Enable generation of conditional move (@code{l.cmov}) instructions. By Enable generation of conditional move (@code{l.cmov}) instructions. By
default the equivalent will be generated using using set and branch. default the equivalent will be generated using set and branch.
@item -mror @item -mror
@opindex mror @opindex mror
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