re PR rtl-optimization/91136 (incorrect move of instruction to delay slot causes…

re PR rtl-optimization/91136 (incorrect move of instruction to delay slot causes application crash in exception handling)

	PR rtl-optimization/91136
	* df-core.c (ACCESSING REFS): Fix typos in comment.
	* resource.c (mark_target_live_reg): Add artificial defs that occur at
	the beginning of the block to the initial set of live registers.

From-SVN: r273436

gcc/ChangeLog

+2019-07-12  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR rtl-optimization/91136
+	* df-core.c (ACCESSING REFS): Fix typos in comment.
+	* resource.c (mark_target_live_reg): Add artificial defs that occur at
+	the beginning of the block to the initial set of live registers.
+
 2019-07-12  Richard Biener  <rguenther@suse.de>
 
 	* fold-const.h (get_array_ctor_element_at_index): Adjust.

gcc/df-core.c

@@ -298,12 +298,12 @@ There are 4 ways to obtain access to refs:
 
    Artificial defs and uses occur both at the beginning and ends of blocks.
 
-     For blocks that area at the destination of eh edges, the
+     For blocks that are at the destination of eh edges, the
      artificial uses and defs occur at the beginning.  The defs relate
      to the registers specified in EH_RETURN_DATA_REGNO and the uses
-     relate to the registers specified in ED_USES.  Logically these
+     relate to the registers specified in EH_USES.  Logically these
      defs and uses should really occur along the eh edge, but there is
-     no convenient way to do this.  Artificial edges that occur at the
+     no convenient way to do this.  Artificial defs that occur at the
      beginning of the block have the DF_REF_AT_TOP flag set.
 
      Artificial uses occur at the end of all blocks.  These arise from

gcc/resource.c

@@ -987,9 +987,13 @@ mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resource
     {
       regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b));
       rtx_insn *start_insn, *stop_insn;
+      df_ref def;
 
       /* Compute hard regs live at start of block.  */
       REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
+      FOR_EACH_ARTIFICIAL_DEF (def, b)
+	if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
+	  SET_HARD_REG_BIT (current_live_regs, DF_REF_REGNO (def));
 
       /* Get starting and ending insn, handling the case where each might
 	 be a SEQUENCE.  */