Add 403 support.

From-SVN: r9182

gcc/config/rs6000/powerpc.h

@@ -46,6 +46,9 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
 %{mcpu=rios2: -D_ARCH_PWR2} \
 %{mcpu=rsc: -D_ARCH_PWR} \
 %{mcpu=rsc1: -D_ARCH_PWR} \
+%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=mpc403: -D_ARCH_PPC} \
+%{mcpu=ppc403: -D_ARCH_PPC} \
 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \

gcc/config/rs6000/rs6000.c

@@ -115,6 +115,15 @@ rs6000_override_options ()
 	 {"rios2", PROCESSOR_RIOS2,
 	    MASK_POWER | MASK_MULTIPLE | MASK_POWER2,
 	    POWERPC_MASKS | MASK_NEW_MNEMONICS},
+	 {"403", PROCESSOR_PPC403,
+	    MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
+	    POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
+	 {"mpc403", PROCESSOR_PPC403,
+	    MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
+	    POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
+	 {"ppc403", PROCESSOR_PPC403,
+	    MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
+	    POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
 	 {"601", PROCESSOR_PPC601,
 	    MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE,
 	    MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},

gcc/config/rs6000/rs6000.h

@@ -60,6 +60,9 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
 %{mcpu=rios2: -D_ARCH_PWR2} \
 %{mcpu=rsc: -D_ARCH_PWR} \
 %{mcpu=rsc1: -D_ARCH_PWR} \
+%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=mpc403: -D_ARCH_PPC} \
+%{mcpu=ppc403: -D_ARCH_PPC} \
 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \
@@ -218,6 +221,7 @@ extern int target_flags;
 enum processor_type
  {PROCESSOR_RIOS1,
   PROCESSOR_RIOS2,
+  PROCESSOR_PPC403,
   PROCESSOR_PPC601,
   PROCESSOR_PPC603,
   PROCESSOR_PPC604,
@@ -1595,6 +1599,7 @@ struct rs6000_args {int words, fregno, nargs_prototype; };
     case PROCESSOR_PPC601:				\
     case PROCESSOR_PPC603:				\
       return COSTS_N_INSNS (5);				\
+    case PROCESSOR_PPC403:				\
     case PROCESSOR_PPC604:				\
     case PROCESSOR_PPC620:				\
       return COSTS_N_INSNS (4);				\
@@ -1613,6 +1618,8 @@ struct rs6000_args {int words, fregno, nargs_prototype; };
       return COSTS_N_INSNS (19);			\
     case PROCESSOR_RIOS2:				\
       return COSTS_N_INSNS (13);			\
+    case PROCESSOR_PPC403:				\
+      return COSTS_N_INSNS (33);			\
     case PROCESSOR_PPC601:				\
       return COSTS_N_INSNS (36);			\
     case PROCESSOR_PPC603:				\

gcc/config/rs6000/rs6000.md

@@ -39,7 +39,7 @@
 ;; Processor type -- this attribute must exactly match the processor_type
 ;; enumeration in rs6000.h.
 
-(define_attr "cpu" "rios1,rios2,ppc601,ppc603,ppc604,ppc620"
+(define_attr "cpu" "rios1,rios2,ppc403,ppc601,ppc603,ppc604,ppc620"
   (const (symbol_ref "rs6000_cpu_attr")))
 
 ; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
@@ -59,7 +59,7 @@
 
 (define_function_unit "iu" 1 0
   (and (eq_attr "type" "load")
-       (eq_attr "cpu" "rios1,ppc601"))
+       (eq_attr "cpu" "rios1,ppc403,ppc601"))
   2 0)
 
 (define_function_unit "iu" 1 0
@@ -76,6 +76,11 @@
 
 (define_function_unit "iu" 1 0
   (and (eq_attr "type" "imul")
+       (eq_attr "cpu" "ppc403"))
+  4 4)
+
+(define_function_unit "iu" 1 0
+  (and (eq_attr "type" "imul")
        (eq_attr "cpu" "ppc601,ppc603"))
   5 5)
 
@@ -86,6 +91,11 @@
 
 (define_function_unit "iu" 1 0
   (and (eq_attr "type" "idiv")
+       (eq_attr "cpu" "ppc403"))
+  33 33)
+
+(define_function_unit "iu" 1 0
+  (and (eq_attr "type" "idiv")
        (eq_attr "cpu" "ppc601"))
   36 36)
 
@@ -160,7 +170,7 @@
 
 (define_function_unit "bpu" 1 0
   (and (eq_attr "type" "mtjmpr")
-       (eq_attr "cpu" "ppc601,ppc603,ppc604,ppc620"))
+       (eq_attr "cpu" "ppc403,ppc601,ppc603,ppc604,ppc620"))
   4 0)
 
 ; Floating Point Unit (RIOS1, PPC601, PPC603, PPC604).

gcc/config/rs6000/sysv4.h

@@ -290,6 +290,9 @@ extern int rs6000_pic_labelno;
 %{mcpu=rios2: -D_ARCH_PWR2} \
 %{mcpu=rsc: -D_ARCH_PWR} \
 %{mcpu=rsc1: -D_ARCH_PWR} \
+%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=mpc403: -D_ARCH_PPC} \
+%{mcpu=ppc403: -D_ARCH_PPC} \
 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
 %{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \