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riscv-gcc-1
Commit 4888ec5d by Ulrich Weigand Committed by Ulrich Weigand
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s390-protos.h (preferred_la_operand_p): Remove second parameter. 

	* config/s390/s390-protos.h (preferred_la_operand_p):
	Remove second parameter.
	* config/s390/s390.c (preferred_la_operand_p): Likewise.
	* config/s390/s390.h (FRAME_REGNO_P, FRAME_REG_P): New macros.
	(HARD_REGNO_MODE_OK): Use FRAME_REGNO_P.
	* config/s390/s390.md ("*la_cc_64", "*la_cc_31", splitters): Remove.
	Add peepholes to transform ADD to LOAD ADDRESS.

From-SVN: r61594
parent e6686813
Showing with 72 additions and 46 deletions
gcc/ChangeLog
2003-01-22 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390-protos.h (preferred_la_operand_p):
Remove second parameter.
* config/s390/s390.c (preferred_la_operand_p): Likewise.
* config/s390/s390.h (FRAME_REGNO_P, FRAME_REG_P): New macros.
(HARD_REGNO_MODE_OK): Use FRAME_REGNO_P.
* config/s390/s390.md ("*la_cc_64", "*la_cc_31", splitters): Remove.
Add peepholes to transform ADD to LOAD ADDRESS.
2003-01-22 Richard Earnshaw <rearnsha@arm.com> 2003-01-22 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_address_register_rtx_p): New function. * arm.c (arm_address_register_rtx_p): New function.
......
gcc/config/s390/s390-protos.h
...@@ -49,7 +49,7 @@ extern enum machine_mode s390_tm_ccmode PARAMS ((rtx, rtx, int)); ...@@ -49,7 +49,7 @@ extern enum machine_mode s390_tm_ccmode PARAMS ((rtx, rtx, int));
extern enum machine_mode s390_select_ccmode PARAMS ((enum rtx_code, rtx, rtx)); extern enum machine_mode s390_select_ccmode PARAMS ((enum rtx_code, rtx, rtx));
extern int symbolic_reference_mentioned_p PARAMS ((rtx)); extern int symbolic_reference_mentioned_p PARAMS ((rtx));
extern int legitimate_la_operand_p PARAMS ((rtx)); extern int legitimate_la_operand_p PARAMS ((rtx));
extern int preferred_la_operand_p PARAMS ((rtx, int)); extern int preferred_la_operand_p PARAMS ((rtx));
extern int legitimate_pic_operand_p PARAMS ((rtx)); extern int legitimate_pic_operand_p PARAMS ((rtx));
extern int legitimate_constant_p PARAMS ((rtx)); extern int legitimate_constant_p PARAMS ((rtx));
extern int legitimate_reload_constant_p PARAMS ((rtx)); extern int legitimate_reload_constant_p PARAMS ((rtx));
......
gcc/config/s390/s390.c
...@@ -1875,14 +1875,11 @@ legitimate_la_operand_p (op) ...@@ -1875,14 +1875,11 @@ legitimate_la_operand_p (op)
} }
/* Return 1 if OP is a valid operand for the LA instruction, /* Return 1 if OP is a valid operand for the LA instruction,
and we prefer to use LA over addition to compute it. and we prefer to use LA over addition to compute it. */
If STRICT is true, only accept operands that will never
change to something we cannot recognize as preferred. */
int int
preferred_la_operand_p (op, strict) preferred_la_operand_p (op)
register rtx op; register rtx op;
int strict;
{ {
struct s390_address addr; struct s390_address addr;
if (!s390_decompose_address (op, &addr)) if (!s390_decompose_address (op, &addr))
...@@ -1894,10 +1891,9 @@ preferred_la_operand_p (op, strict) ...@@ -1894,10 +1891,9 @@ preferred_la_operand_p (op, strict)
if (addr.pointer) if (addr.pointer)
return TRUE; return TRUE;
if (!strict) if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base)) || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
|| (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx))) return TRUE;
return TRUE;
return FALSE; return FALSE;
} }
......
gcc/config/s390/s390.h
...@@ -235,11 +235,13 @@ if (INTEGRAL_MODE_P (MODE) && \ ...@@ -235,11 +235,13 @@ if (INTEGRAL_MODE_P (MODE) && \
#define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16) #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
#define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20)) #define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
#define CC_REGNO_P(N) ((N) == 33) #define CC_REGNO_P(N) ((N) == 33)
#define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34)
#define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
#define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X))) #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
#define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
#define BASE_REGISTER 13 #define BASE_REGISTER 13
#define RETURN_REGNUM 14 #define RETURN_REGNUM 14
...@@ -354,6 +356,8 @@ do \ ...@@ -354,6 +356,8 @@ do \
(HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \ (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
CC_REGNO_P(REGNO)? \ CC_REGNO_P(REGNO)? \
GET_MODE_CLASS (MODE) == MODE_CC : \ GET_MODE_CLASS (MODE) == MODE_CC : \
FRAME_REGNO_P(REGNO)? \
(MODE) == Pmode : \
0) 0)
#define MODES_TIEABLE_P(MODE1, MODE2) \ #define MODES_TIEABLE_P(MODE1, MODE2) \
......
gcc/config/s390/s390.md
...@@ -2902,24 +2902,6 @@ ...@@ -2902,24 +2902,6 @@
; adddi3 instruction pattern(s). ; adddi3 instruction pattern(s).
; ;
(define_insn "*la_64_cc"
[(set (match_operand:DI 0 "register_operand" "=d")
(match_operand:QI 1 "address_operand" "p"))
(clobber (reg:CC 33))]
"TARGET_64BIT
&& preferred_la_operand_p (operands[1], 1)"
"#"
[(set_attr "op_type" "RX")
(set_attr "type" "la")])
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))]
"TARGET_64BIT && reload_completed
&& preferred_la_operand_p (operands[1], 0)"
[(set (match_dup 0) (match_dup 1))])
(define_insn "*adddi3_sign" (define_insn "*adddi3_sign"
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
(plus:DI (sign_extend:DI (match_operand:SI 2 "general_operand" "d,m")) (plus:DI (sign_extend:DI (match_operand:SI 2 "general_operand" "d,m"))
...@@ -3079,6 +3061,32 @@ ...@@ -3079,6 +3061,32 @@
[(set_attr "op_type" "RX") [(set_attr "op_type" "RX")
(set_attr "type" "la")]) (set_attr "type" "la")])
(define_peephole2
[(parallel
[(set (match_operand:DI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))])]
"TARGET_64BIT
&& strict_memory_address_p (VOIDmode, operands[1])
&& preferred_la_operand_p (operands[1])"
[(set (match_dup 0) (match_dup 1))]
"")
(define_peephole2
[(set (match_operand:DI 0 "register_operand" "")
(match_operand:DI 1 "register_operand" ""))
(parallel
[(set (match_dup 0)
(plus:DI (match_dup 0)
(match_operand:DI 2 "nonmemory_operand" "")))
(clobber (reg:CC 33))])]
"TARGET_64BIT
&& !reg_overlap_mentioned_p (operands[0], operands[2])
&& strict_memory_address_p (VOIDmode, gen_rtx_PLUS (DImode, operands[1], operands[2]))
&& preferred_la_operand_p (gen_rtx_PLUS (DImode, operands[1], operands[2]))"
[(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))]
"")
(define_expand "reload_indi" (define_expand "reload_indi"
[(parallel [(match_operand:DI 0 "register_operand" "=a") [(parallel [(match_operand:DI 0 "register_operand" "=a")
(match_operand:DI 1 "s390_plus_operand" "") (match_operand:DI 1 "s390_plus_operand" "")
...@@ -3095,24 +3103,6 @@ ...@@ -3095,24 +3103,6 @@
; addsi3 instruction pattern(s). ; addsi3 instruction pattern(s).
; ;
(define_insn "*la_31_cc"
[(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:QI 1 "address_operand" "p"))
(clobber (reg:CC 33))]
"!TARGET_64BIT
&& preferred_la_operand_p (operands[1], 1)"
"#"
[(set_attr "op_type" "RX")
(set_attr "type" "la")])
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))]
"!TARGET_64BIT && reload_completed
&& preferred_la_operand_p (operands[1], 0)"
[(set (match_dup 0) (match_dup 1))])
(define_insn "*addsi3_imm_cc" (define_insn "*addsi3_imm_cc"
[(set (reg 33) [(set (reg 33)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "0")
...@@ -3249,6 +3239,32 @@ ...@@ -3249,6 +3239,32 @@
[(set_attr "op_type" "RX") [(set_attr "op_type" "RX")
(set_attr "type" "la")]) (set_attr "type" "la")])
(define_peephole2
[(parallel
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))])]
"!TARGET_64BIT
&& strict_memory_address_p (VOIDmode, operands[1])
&& preferred_la_operand_p (operands[1])"
[(set (match_dup 0) (match_dup 1))]
"")
(define_peephole2
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" ""))
(parallel
[(set (match_dup 0)
(plus:SI (match_dup 0)
(match_operand:SI 2 "nonmemory_operand" "")))
(clobber (reg:CC 33))])]
"!TARGET_64BIT
&& !reg_overlap_mentioned_p (operands[0], operands[2])
&& strict_memory_address_p (VOIDmode, gen_rtx_PLUS (SImode, operands[1], operands[2]))
&& preferred_la_operand_p (gen_rtx_PLUS (SImode, operands[1], operands[2]))"
[(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))]
"")
(define_insn "*la_31_and" (define_insn "*la_31_and"
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(and:SI (match_operand:QI 1 "address_operand" "p") (and:SI (match_operand:QI 1 "address_operand" "p")
......
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