Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
4849e836
Commit
4849e836
authored
Oct 11, 2008
by
David Edelsohn
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Really commit rs6000.opt
From-SVN: r141066
parent
9f7ccf69
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
10 additions
and
0 deletions
+10
-0
gcc/config/rs6000/rs6000.opt
+10
-0
No files found.
gcc/config/rs6000/rs6000.opt
View file @
4849e836
...
...
@@ -272,3 +272,13 @@ Double-precision floating point unit
msimple-fpu
Target RejectNegative Var(rs6000_simple_fpu)
Floating point unit does not support divide & sqrt
mfpu=
Target RejectNegative Joined
-mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu)
mxilinx-fpu
Target Var(rs6000_xilinx_fpu)
Specify Xilinx FPU.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment